From: Rob Herring <robh@kernel.org>
To: Liu Peibao <liupeibao@loongson.cn>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Huacai Chen <chenhuacai@kernel.org>,
WANG Xuerui <kernel@xen0n.name>,
Jianmin Lv <lvjianmin@loongson.cn>,
Yinbo Zhu <zhuyinbo@loongson.cn>,
wanghongliang <wanghongliang@loongson.cn>,
linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller
Date: Wed, 7 Dec 2022 20:09:54 -0600 [thread overview]
Message-ID: <20221208020954.GA3368836-robh@kernel.org> (raw)
In-Reply-To: <20221114113824.1880-3-liupeibao@loongson.cn>
On Mon, Nov 14, 2022 at 07:38:24PM +0800, Liu Peibao wrote:
> Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how
> the 14 IRQs are wired to the platform's internal interrupt controller by
> devicetree.
>
> Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
> ---
> .../loongarch,cpu-interrupt-controller.yaml | 34 +++++++++++++++++++
> 1 file changed, 34 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
> new file mode 100644
> index 000000000000..2a1cf885c99d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
> @@ -0,0 +1,34 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: LoongArch CPU Interrupt Controller
> +
> +maintainers:
> + - Liu Peibao <liupeibao@loongson.cn>
> +
> +properties:
> + compatible:
> + const: loongarch,cpu-interrupt-controller
This doesn't match what the kernel is using. It has loongson rather than
loongarch. Please send an incremental fix. (Don't forget the example)
Rob
next prev parent reply other threads:[~2022-12-08 2:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-14 11:38 [PATCH v2 0/2] irqchip: loongarch-cpu: add DT support Liu Peibao
2022-11-14 11:38 ` [PATCH v2 1/2] " Liu Peibao
2022-12-02 2:07 ` Huacai Chen
2022-12-02 8:45 ` Marc Zyngier
2022-12-05 4:42 ` Huacai Chen
2022-11-14 11:38 ` [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller Liu Peibao
2022-11-15 16:40 ` Krzysztof Kozlowski
2022-12-08 2:09 ` Rob Herring [this message]
2022-12-08 2:46 ` Liu Peibao
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