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From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Olliver Schinagl <oliver@schinagl.nl>
Cc: Sander Vanheule <sander@svanheule.net>,
	linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] mips: Realtek RTL: select NO_EXCEPT_FILL
Date: Sun, 19 Feb 2023 10:02:48 +0100	[thread overview]
Message-ID: <20230219090248.GE2924@alpha.franken.de> (raw)
In-Reply-To: <af2cdad5-ee32-7956-cd77-2a18777a3857@schinagl.nl>

On Fri, Feb 17, 2023 at 08:27:05PM +0100, Olliver Schinagl wrote:
> It is the Realtek series of SoC, specifically in my case, the RTL9302b,
> which doesn't have a PCI peripherial, at all :) Nor configured in the
> devicetree, but of course generic_mips_kernel enables the drivers, which
> should be noop. I don't see anything related to PCI during boot.
> 
> Having said that, the RTL930x series take their heritage from the RTL819x
> (and probably older) wifi SoC series from realtek, which did contain a PCIe
> peripherial, as that is where the (external) wifi chip was connected too.

I see, and you want to use the already existing wifi driver ?

> > Do you have a programmers manual for it,
> > which contains details about the PCI bridge ?
> 
> If only. There are some (leaked) datasheets, that do contain the PCI
> registers, mostly (obviously) the rtl819x datasheets. https://github.com/libc0607/Realtek_switch_hacking/blob/files/REALTEK-RTL8196E.pdf
> is one such example that contains the PCIe registers.

that's just the PCIe PHY part, but not the localbus<->PCIe bridge
part. But if the wifi part of ypur SOC is directly connected to
the localbus, having the some PCI register won't help anyway.
I am afraid you need to go the route via extra Kconfig section.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

  reply	other threads:[~2023-02-19  9:03 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-15 12:19 [PATCH] mips: Realtek RTL: select NO_EXCEPT_FILL Sander Vanheule
2023-01-27 16:27 ` Thomas Bogendoerfer
2023-01-28 14:39   ` Olliver Schinagl
2023-02-05 16:19     ` Thomas Bogendoerfer
2023-02-05 18:33       ` Olliver Schinagl
2023-02-17 17:37         ` Thomas Bogendoerfer
2023-02-17 19:27           ` Olliver Schinagl
2023-02-19  9:02             ` Thomas Bogendoerfer [this message]
2023-02-19  9:27               ` Olliver Schinagl
2023-02-19 10:31                 ` Thomas Bogendoerfer
2023-02-19 16:07                   ` Olliver Schinagl
2023-02-22 15:23                     ` Olliver Schinagl

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