[PATCH 1/2] mips: remove SYS_HAS_CPU_MIPS32_R1 from RALINK

[PATCH 1/2] mips: remove SYS_HAS_CPU_MIPS32_R1 from RALINK

[arinc9.unal]

From: Arınç ÜNAL <arinc.unal@arinc9.com>

All MIPS processors on the Ralink SoCs implement the MIPS32 Release 2
Architecture. Remove SYS_HAS_CPU_MIPS32_R1.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---

The RT2880 SoC is MIPS 4KEc, the remaining SoCs are MIPS 24KEc. All of
which implement the MIPS32 Release 2 Architecture, if I understand
correctly. My incentive for this is to automatically have MIPS32R2 selected
as the CPU type.

---
 arch/mips/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 37072e15b263..0e8dab9a57de 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -610,7 +610,6 @@ config RALINK
 	select DMA_NONCOHERENT
 	select IRQ_MIPS_CPU
 	select USE_OF
-	select SYS_HAS_CPU_MIPS32_R1
 	select SYS_HAS_CPU_MIPS32_R2
 	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
-- 
2.37.2

[PATCH 2/2] mips: ralink: make SOC_MT7621 select PINCTRL

[arinc9.unal]

From: Arınç ÜNAL <arinc.unal@arinc9.com>

Currently, out of every Ralink SoC, only the dt-binding of the MT7621 SoC
uses pinctrl. Because of this, PINCTRL is not selected at all. Make
SOC_MT7621 select PINCTRL.

Remove PINCTRL_MT7621, enabling it for the MT7621 SoC will be handled under
the PINCTRL_MT7621 option.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---
 arch/mips/ralink/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 06031796c87b..83e61e147b90 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -54,7 +54,7 @@ choice
 		select HAVE_PCI
 		select PCI_DRIVERS_GENERIC
 		select SOC_BUS
-		select PINCTRL_MT7621
+		select PINCTRL
 
 		help
 		  The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc
-- 
2.37.2

Re: [PATCH 2/2] mips: ralink: make SOC_MT7621 select PINCTRL

[Sergio Paracuellos]

Hi Arınç,

On Tue, Feb 21, 2023 at 10:24 AM <arinc9.unal@gmail.com> wrote:
>
> From: Arınç ÜNAL <arinc.unal@arinc9.com>
>
> Currently, out of every Ralink SoC, only the dt-binding of the MT7621 SoC
> uses pinctrl. Because of this, PINCTRL is not selected at all. Make
> SOC_MT7621 select PINCTRL.
>
> Remove PINCTRL_MT7621, enabling it for the MT7621 SoC will be handled under
> the PINCTRL_MT7621 option.
>
> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> ---
>  arch/mips/ralink/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
> index 06031796c87b..83e61e147b90 100644
> --- a/arch/mips/ralink/Kconfig
> +++ b/arch/mips/ralink/Kconfig
> @@ -54,7 +54,7 @@ choice
>                 select HAVE_PCI
>                 select PCI_DRIVERS_GENERIC
>                 select SOC_BUS
> -               select PINCTRL_MT7621
> +               select PINCTRL
>
>                 help
>                   The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc
> --
> 2.37.2
>

Which git tree are you working against? CONFIG_SOC_MT7621 is not
selecting PINCTRL_MT7621 at all in v6.2 [0]. I think it should select
'PINCTRL_MT7621' and the 'select PINCTRL' stuff added inside the
PINCTRL_RALINK option in [1].

Am I missing something?

Thanks,
    Sergio Paracuellos

[0]: https://elixir.bootlin.com/linux/v6.2/source/arch/mips/ralink/Kconfig
[1]: https://elixir.bootlin.com/linux/v6.2/source/drivers/pinctrl/ralink/Kconfig#L5

Re: [PATCH 2/2] mips: ralink: make SOC_MT7621 select PINCTRL

[Arınç ÜNAL]

On 21.02.2023 12:38, Sergio Paracuellos wrote:
> Hi Arınç,
> 
> On Tue, Feb 21, 2023 at 10:24 AM <arinc9.unal@gmail.com> wrote:
>>
>> From: Arınç ÜNAL <arinc.unal@arinc9.com>
>>
>> Currently, out of every Ralink SoC, only the dt-binding of the MT7621 SoC
>> uses pinctrl. Because of this, PINCTRL is not selected at all. Make
>> SOC_MT7621 select PINCTRL.
>>
>> Remove PINCTRL_MT7621, enabling it for the MT7621 SoC will be handled under
>> the PINCTRL_MT7621 option.
>>
>> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
>> ---
>>   arch/mips/ralink/Kconfig | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
>> index 06031796c87b..83e61e147b90 100644
>> --- a/arch/mips/ralink/Kconfig
>> +++ b/arch/mips/ralink/Kconfig
>> @@ -54,7 +54,7 @@ choice
>>                  select HAVE_PCI
>>                  select PCI_DRIVERS_GENERIC
>>                  select SOC_BUS
>> -               select PINCTRL_MT7621
>> +               select PINCTRL
>>
>>                  help
>>                    The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc
>> --
>> 2.37.2
>>
> 
> Which git tree are you working against? CONFIG_SOC_MT7621 is not
> selecting PINCTRL_MT7621 at all in v6.2 [0]. I think it should select

mips/linux.git mips-next tree.

https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/log/

> 'PINCTRL_MT7621' and the 'select PINCTRL' stuff added inside the
> PINCTRL_RALINK option in [1].

I'm working on that, although not exactly the way you describe here, on 
this branch of mine.

https://github.com/arinc9/linux/commits/ralink-pinctrl

Arınç

Re: [PATCH 2/2] mips: ralink: make SOC_MT7621 select PINCTRL

[Sergio Paracuellos]

On Tue, Feb 21, 2023 at 11:09 AM Arınç ÜNAL <arinc.unal@arinc9.com> wrote:
>
> On 21.02.2023 12:38, Sergio Paracuellos wrote:
> > Hi Arınç,
> >
> > On Tue, Feb 21, 2023 at 10:24 AM <arinc9.unal@gmail.com> wrote:
> >>
> >> From: Arınç ÜNAL <arinc.unal@arinc9.com>
> >>
> >> Currently, out of every Ralink SoC, only the dt-binding of the MT7621 SoC
> >> uses pinctrl. Because of this, PINCTRL is not selected at all. Make
> >> SOC_MT7621 select PINCTRL.
> >>
> >> Remove PINCTRL_MT7621, enabling it for the MT7621 SoC will be handled under
> >> the PINCTRL_MT7621 option.
> >>
> >> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> >> ---
> >>   arch/mips/ralink/Kconfig | 2 +-
> >>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
> >> index 06031796c87b..83e61e147b90 100644
> >> --- a/arch/mips/ralink/Kconfig
> >> +++ b/arch/mips/ralink/Kconfig
> >> @@ -54,7 +54,7 @@ choice
> >>                  select HAVE_PCI
> >>                  select PCI_DRIVERS_GENERIC
> >>                  select SOC_BUS
> >> -               select PINCTRL_MT7621
> >> +               select PINCTRL
> >>
> >>                  help
> >>                    The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc
> >> --
> >> 2.37.2
> >>
> >
> > Which git tree are you working against? CONFIG_SOC_MT7621 is not
> > selecting PINCTRL_MT7621 at all in v6.2 [0]. I think it should select
>
> mips/linux.git mips-next tree.
>
> https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/log/

I see :). Thanks!

>
> > 'PINCTRL_MT7621' and the 'select PINCTRL' stuff added inside the
> > PINCTRL_RALINK option in [1].
>
> I'm working on that, although not exactly the way you describe here, on
> this branch of mine.

So, in which way do you get PINCTRL_MT7621 automatically selected for
this SoC now? I think looking into the Kconfig for ralink pinctrl [0]
all of them at the end need the missing PINCTRL option to be added and
all of them are currently selecting PINCTRL_RALINK . Hence just adding
the PINCTRL option inside PINCTRL_RALINK looks convenient.

>
> https://github.com/arinc9/linux/commits/ralink-pinctrl

Wow! Tons of changes here ;-). Keep going!!

>
> Arınç

Best regards,
    Sergio Paracuellos

[0]: https://elixir.bootlin.com/linux/v6.2/source/drivers/pinctrl/ralink/Kconfig

Re: [PATCH 2/2] mips: ralink: make SOC_MT7621 select PINCTRL

[Arınç ÜNAL]

On 21.02.2023 13:21, Sergio Paracuellos wrote:
> On Tue, Feb 21, 2023 at 11:09 AM Arınç ÜNAL <arinc.unal@arinc9.com> wrote:
>>
>> On 21.02.2023 12:38, Sergio Paracuellos wrote:
>>> Hi Arınç,
>>>
>>> On Tue, Feb 21, 2023 at 10:24 AM <arinc9.unal@gmail.com> wrote:
>>>>
>>>> From: Arınç ÜNAL <arinc.unal@arinc9.com>
>>>>
>>>> Currently, out of every Ralink SoC, only the dt-binding of the MT7621 SoC
>>>> uses pinctrl. Because of this, PINCTRL is not selected at all. Make
>>>> SOC_MT7621 select PINCTRL.
>>>>
>>>> Remove PINCTRL_MT7621, enabling it for the MT7621 SoC will be handled under
>>>> the PINCTRL_MT7621 option.
>>>>
>>>> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
>>>> ---
>>>>    arch/mips/ralink/Kconfig | 2 +-
>>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
>>>> index 06031796c87b..83e61e147b90 100644
>>>> --- a/arch/mips/ralink/Kconfig
>>>> +++ b/arch/mips/ralink/Kconfig
>>>> @@ -54,7 +54,7 @@ choice
>>>>                   select HAVE_PCI
>>>>                   select PCI_DRIVERS_GENERIC
>>>>                   select SOC_BUS
>>>> -               select PINCTRL_MT7621
>>>> +               select PINCTRL
>>>>
>>>>                   help
>>>>                     The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc
>>>> --
>>>> 2.37.2
>>>>
>>>
>>> Which git tree are you working against? CONFIG_SOC_MT7621 is not
>>> selecting PINCTRL_MT7621 at all in v6.2 [0]. I think it should select
>>
>> mips/linux.git mips-next tree.
>>
>> https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/log/
> 
> I see :). Thanks!
> 
>>
>>> 'PINCTRL_MT7621' and the 'select PINCTRL' stuff added inside the
>>> PINCTRL_RALINK option in [1].
>>
>> I'm working on that, although not exactly the way you describe here, on
>> this branch of mine.
> 
> So, in which way do you get PINCTRL_MT7621 automatically selected for
> this SoC now? I think looking into the Kconfig for ralink pinctrl [0]
> all of them at the end need the missing PINCTRL option to be added and
> all of them are currently selecting PINCTRL_RALINK . Hence just adding
> the PINCTRL option inside PINCTRL_RALINK looks convenient.

PINCTRL_RALINK won't appear on the menuconfig unless PINCTRL is enabled. 
So this'd be pointless.

 From what I see on other MIPS and ARM platforms, PINCTRL is supposed to 
be enabled at the platform option, like CONFIG_RALINK. However, the 
Ralink SoCs except MT7621, or rather the DTs for them, do not use the 
pinctrl driver so I only enable it for MT7621, and keep it optional for 
the remaining SoCs.

MediaTek pinctrl kconfig enables the pinctrl driver specific to the SoC 
by default, if the said SoC is enabled. I'm keeping this method when 
moving ralink pinctrl to mediatek with the series below.

So once the pinctrl driver is defined on the DTs for the remaining SoCs, 
we can just put PINCTRL under CONFIG_RALINK and everything will work fine.

> 
>>
>> https://github.com/arinc9/linux/commits/ralink-pinctrl
> 
> Wow! Tons of changes here ;-). Keep going!!

Thanks a lot, I've started to refactor everything Ralink. With this 
series, I finalise the work on pinctrl.

Arınç

Re: [PATCH 2/2] mips: ralink: make SOC_MT7621 select PINCTRL

[Sergio Paracuellos]

On Tue, Feb 21, 2023 at 11:54 AM Arınç ÜNAL <arinc.unal@arinc9.com> wrote:
>
> On 21.02.2023 13:21, Sergio Paracuellos wrote:
> > On Tue, Feb 21, 2023 at 11:09 AM Arınç ÜNAL <arinc.unal@arinc9.com> wrote:
> >>
> >> On 21.02.2023 12:38, Sergio Paracuellos wrote:
> >>> Hi Arınç,
> >>>
> >>> On Tue, Feb 21, 2023 at 10:24 AM <arinc9.unal@gmail.com> wrote:
> >>>>
> >>>> From: Arınç ÜNAL <arinc.unal@arinc9.com>
> >>>>
> >>>> Currently, out of every Ralink SoC, only the dt-binding of the MT7621 SoC
> >>>> uses pinctrl. Because of this, PINCTRL is not selected at all. Make
> >>>> SOC_MT7621 select PINCTRL.
> >>>>
> >>>> Remove PINCTRL_MT7621, enabling it for the MT7621 SoC will be handled under
> >>>> the PINCTRL_MT7621 option.
> >>>>
> >>>> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> >>>> ---
> >>>>    arch/mips/ralink/Kconfig | 2 +-
> >>>>    1 file changed, 1 insertion(+), 1 deletion(-)
> >>>>
> >>>> diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
> >>>> index 06031796c87b..83e61e147b90 100644
> >>>> --- a/arch/mips/ralink/Kconfig
> >>>> +++ b/arch/mips/ralink/Kconfig
> >>>> @@ -54,7 +54,7 @@ choice
> >>>>                   select HAVE_PCI
> >>>>                   select PCI_DRIVERS_GENERIC
> >>>>                   select SOC_BUS
> >>>> -               select PINCTRL_MT7621
> >>>> +               select PINCTRL
> >>>>
> >>>>                   help
> >>>>                     The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc
> >>>> --
> >>>> 2.37.2
> >>>>
> >>>
> >>> Which git tree are you working against? CONFIG_SOC_MT7621 is not
> >>> selecting PINCTRL_MT7621 at all in v6.2 [0]. I think it should select
> >>
> >> mips/linux.git mips-next tree.
> >>
> >> https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/log/
> >
> > I see :). Thanks!
> >
> >>
> >>> 'PINCTRL_MT7621' and the 'select PINCTRL' stuff added inside the
> >>> PINCTRL_RALINK option in [1].
> >>
> >> I'm working on that, although not exactly the way you describe here, on
> >> this branch of mine.
> >
> > So, in which way do you get PINCTRL_MT7621 automatically selected for
> > this SoC now? I think looking into the Kconfig for ralink pinctrl [0]
> > all of them at the end need the missing PINCTRL option to be added and
> > all of them are currently selecting PINCTRL_RALINK . Hence just adding
> > the PINCTRL option inside PINCTRL_RALINK looks convenient.
>
> PINCTRL_RALINK won't appear on the menuconfig unless PINCTRL is enabled.
> So this'd be pointless.

Oh, yes. You are totally right. My bad here, sorry for the noise.

>
>  From what I see on other MIPS and ARM platforms, PINCTRL is supposed to
> be enabled at the platform option, like CONFIG_RALINK. However, the
> Ralink SoCs except MT7621, or rather the DTs for them, do not use the
> pinctrl driver so I only enable it for MT7621, and keep it optional for
> the remaining SoCs.
>
> MediaTek pinctrl kconfig enables the pinctrl driver specific to the SoC
> by default, if the said SoC is enabled. I'm keeping this method when
> moving ralink pinctrl to mediatek with the series below.
>
> So once the pinctrl driver is defined on the DTs for the remaining SoCs,
> we can just put PINCTRL under CONFIG_RALINK and everything will work fine.

Sounds good, then. Thanks!

Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>

>
> >
> >>
> >> https://github.com/arinc9/linux/commits/ralink-pinctrl
> >
> > Wow! Tons of changes here ;-). Keep going!!
>
> Thanks a lot, I've started to refactor everything Ralink. With this
> series, I finalise the work on pinctrl.
>
> Arınç

Best regards,
    Sergio Paracuellos

Re: [PATCH 1/2] mips: remove SYS_HAS_CPU_MIPS32_R1 from RALINK

[Sergio Paracuellos]

On Tue, Feb 21, 2023 at 10:24 AM <arinc9.unal@gmail.com> wrote:
>
> From: Arınç ÜNAL <arinc.unal@arinc9.com>
>
> All MIPS processors on the Ralink SoCs implement the MIPS32 Release 2
> Architecture. Remove SYS_HAS_CPU_MIPS32_R1.
>
> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> ---

Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>

Best regards,
    Sergio Paracuellos

Re: [PATCH 1/2] mips: remove SYS_HAS_CPU_MIPS32_R1 from RALINK

[Thomas Bogendoerfer]

On Tue, Feb 21, 2023 at 12:24:34PM +0300, arinc9.unal@gmail.com wrote:
> From: Arınç ÜNAL <arinc.unal@arinc9.com>
> 
> All MIPS processors on the Ralink SoCs implement the MIPS32 Release 2
> Architecture. Remove SYS_HAS_CPU_MIPS32_R1.
> 
> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> ---
> 
> The RT2880 SoC is MIPS 4KEc, the remaining SoCs are MIPS 24KEc. All of
> which implement the MIPS32 Release 2 Architecture, if I understand
> correctly. My incentive for this is to automatically have MIPS32R2 selected
> as the CPU type.
> 
> ---
>  arch/mips/Kconfig | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 37072e15b263..0e8dab9a57de 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -610,7 +610,6 @@ config RALINK
>  	select DMA_NONCOHERENT
>  	select IRQ_MIPS_CPU
>  	select USE_OF
> -	select SYS_HAS_CPU_MIPS32_R1
>  	select SYS_HAS_CPU_MIPS32_R2
>  	select SYS_SUPPORTS_32BIT_KERNEL
>  	select SYS_SUPPORTS_LITTLE_ENDIAN
> -- 
> 2.37.2

applied to mips-next.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

Re: [PATCH 2/2] mips: ralink: make SOC_MT7621 select PINCTRL

[Thomas Bogendoerfer]

On Tue, Feb 21, 2023 at 12:24:35PM +0300, arinc9.unal@gmail.com wrote:
> From: Arınç ÜNAL <arinc.unal@arinc9.com>
> 
> Currently, out of every Ralink SoC, only the dt-binding of the MT7621 SoC
> uses pinctrl. Because of this, PINCTRL is not selected at all. Make
> SOC_MT7621 select PINCTRL.
> 
> Remove PINCTRL_MT7621, enabling it for the MT7621 SoC will be handled under
> the PINCTRL_MT7621 option.
> 
> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> ---
>  arch/mips/ralink/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
> index 06031796c87b..83e61e147b90 100644
> --- a/arch/mips/ralink/Kconfig
> +++ b/arch/mips/ralink/Kconfig
> @@ -54,7 +54,7 @@ choice
>  		select HAVE_PCI
>  		select PCI_DRIVERS_GENERIC
>  		select SOC_BUS
> -		select PINCTRL_MT7621
> +		select PINCTRL
>  
>  		help
>  		  The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc
> -- 
> 2.37.2

applied to mips-next.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]