Re: [PATCH v4 16/36] mips: Implement the new page table range API

[Thomas Bogendoerfer <tsbogend@alpha.franken.de>]

On Wed, Mar 15, 2023 at 08:33:21PM +0000, Matthew Wilcox wrote:
> On Wed, Mar 15, 2023 at 11:50:22AM +0100, Thomas Bogendoerfer wrote:
> > On Wed, Mar 15, 2023 at 05:14:24AM +0000, Matthew Wilcox (Oracle) wrote:
> > > Rename _PFN_SHIFT to PFN_PTE_SHIFT.  Convert a few places
> > > to call set_pte() instead of set_pte_at().  Add set_ptes(),
> > > update_mmu_cache_range(), flush_icache_pages() and flush_dcache_folio().
> > 
> > /local/tbogendoerfer/korg/linux/mm/memory.c: In function ‘set_pte_range’:
> > /local/tbogendoerfer/korg/linux/mm/memory.c:4290:2: error: implicit declaration of function ‘update_mmu_cache_range’ [-Werror=implicit-function-declaration]
> >   update_mmu_cache_range(vma, addr, vmf->pte, nr);
> > 
> > update_mmu_cache_range() is missing in this patch.
> 
> Oops.  And mips was one of the arches I did a test build for!
> 
> Looks like we could try to gain some efficiency by passing 'nr' to
> __update_tlb(), but as far as I can tell, that's only called for r3k and
> r4k, so maybe it's not worth optimising at this point?

hmm, not sure if that would help. R4k style TLB has two PTEs mapped
per TLB entry. So by advancing per page __update_tlb() is called more
often than needed.

> Anyway, this add-on makes the mips build compile for me and I'll fold
> it into v5.

tested your v4 with the add-on on QEMU Malta and real hardware without
problems so far. I'll give v5 another spin.

Thomas.

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