[PATCH v2 07/21] MIPS: Fix cache issue with mips_cps_core_entry

Gregory CLEMENT
2023-11-23T15:27:01Z

Split setup_cps_vecs and move back the cache management latter in
cps_smp_setup when the cache subsystem had been initialized. Without
this the blast_inv_dcache_range() call can lead to a crash.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/mips/kernel/smp-cps.c | 32 ++++++++++++++++++--------------
1 file changed, 18 insertions(+), 14 deletions(-)

diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c
index 9aad678a32bd7..6cbdff917d147 100644
--- a/arch/mips/kernel/smp-cps.c
+++ b/arch/mips/kernel/smp-cps.c
@@ -53,6 +53,7 @@ UASM_L_LA(_not_nmi)

static DECLARE_BITMAP(core_power, NR_CPUS);
static uint32_t core_entry_reg;
+static phys_addr_t cps_vec_pa;

struct core_boot_config *mips_cps_core_bootcfg;

@@ -112,17 +113,8 @@ static void __init *mips_cps_build_core_entry(void *addr)
return p;
}

-static int __init setup_cps_vecs(void)
+static int __init allocate_cps_vecs(void)
{
- extern void excep_tlbfill(void);
- extern void excep_xtlbfill(void);
- extern void excep_cache(void);
- extern void excep_genex(void);
- extern void excep_intex(void);
- extern void excep_ejtag(void);
- phys_addr_t cps_vec_pa;
- void *cps_vec;
-
/* Try to allocate in KSEG1 first */
cps_vec_pa = memblock_phys_alloc_range(BEV_VEC_SIZE, BEV_VEC_ALIGN,
0x0, KSEGX_SIZE - 1);
@@ -142,6 +134,19 @@ static int __init setup_cps_vecs(void)
if (!cps_vec_pa)
return -ENOMEM;

+ return 0;
+}
+
+static void __init setup_cps_vecs(void)
+{
+ extern void excep_tlbfill(void);
+ extern void excep_xtlbfill(void);
+ extern void excep_cache(void);
+ extern void excep_genex(void);
+ extern void excep_intex(void);
+ extern void excep_ejtag(void);
+ void *cps_vec;
+
/* We want to ensure cache is clean before writing uncached mem */
blast_dcache_range(TO_CAC(cps_vec_pa), TO_CAC(cps_vec_pa) + BEV_VEC_SIZE);
bc_wback_inv(TO_CAC(cps_vec_pa), BEV_VEC_SIZE);
@@ -161,8 +166,6 @@ static int __init setup_cps_vecs(void)
blast_inv_dcache_range(TO_CAC(cps_vec_pa), TO_CAC(cps_vec_pa) + BEV_VEC_SIZE);
bc_inv(TO_CAC(cps_vec_pa), BEV_VEC_SIZE);
__sync();
-
- return 0;
}

static void __init cps_smp_setup(void)
@@ -224,8 +227,8 @@ static void __init cps_smp_setup(void)
/* Make core 0 coherent with everything */
write_gcr_cl_coherence(0xff);

- if (setup_cps_vecs())
- pr_err("Failed to setup CPS vectors\n");
+ if (allocate_cps_vecs())
+ pr_err("Failed to allocate CPS vectors\n");

if (core_entry_reg && mips_cm_revision() >= CM_REV_CM3)
write_gcr_bev_base(core_entry_reg);
@@ -280,6 +283,7 @@ static void __init cps_prepare_cpus(unsigned int max_cpus)
(cca_unsuitable && cpu_has_dc_aliases) ? " & " : "",
cpu_has_dc_aliases ? "dcache aliasing" : "");

+ setup_cps_vecs();

/* Allocate core boot configuration structs */
ncores = mips_cps_numcores(0);
--
2.42.0