[PATCH 0/1] MIPS: fix the "CPU type" choice structure

[PATCH 0/1] MIPS: fix the "CPU type" choice structure

[Masahiro Yamada]

The bool type "choice" is meant to list exclusively selected config
options.

Unless you are familiar with the Kconfig internals, you will not
understand how CONFIG_B can be enabled in the following code:

  choice
         prompt "Choose one of them, but how to choose B?"

  config A
          bool "A"

  config B
          bool "B"
          depends on A

  config C
          bool "C"

  endchoice

B is not a choice value because it becomes a child of A, as a side-effect
of re-paranting in menu_finalize().
It is unreadable, and I even consider it as a bug.
My plan is to forbid such a silly choice structure.

Just write as follows:

  choice
          prompt "Choose one of them"

  config A
          bool "A"

  config C
          bool "C"

  endchoice

  config B
          bool "B"
          depends on A

Fortunately, arch/mips/Kconfig seems to be the only file I need to fix.



Masahiro Yamada (1):
  MIPS: move unselectable entries out of the "CPU type" choice

 arch/mips/Kconfig | 76 +++++++++++++++++++++++------------------------
 1 file changed, 38 insertions(+), 38 deletions(-)

-- 
2.40.1

[PATCH 1/1] MIPS: move unselectable entries out of the "CPU type" choice

[Masahiro Yamada]

Move the following entries out of the "CPU type" choice:

 - LOONGSON3_ENHANCEMENT
 - CPU_LOONGSON3_WORKAROUNDS
 - CPU_LOONGSON3_CPUCFG_EMULATION

These entries cannot be selected from the choice because they depend on
CPU_LOONGSON64, which is also located in the same choice.

In fact, Kconfig does not consider them as choice values because they
become children of CPU_LOOONGSON64 due to the automatic submenu creation
in menu_finalize().

However, it is hard to understand this behavior unless you are familiar
with the Kconfig internals.

"choice" should contain only selectable entries.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
---

 arch/mips/Kconfig | 76 +++++++++++++++++++++++------------------------
 1 file changed, 38 insertions(+), 38 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 797ae590ebdb..a70b4f959fb1 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1269,44 +1269,6 @@ config CPU_LOONGSON64
 	  3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
 	  Loongson-2E/2F is not covered here and will be removed in future.
 
-config LOONGSON3_ENHANCEMENT
-	bool "New Loongson-3 CPU Enhancements"
-	default n
-	depends on CPU_LOONGSON64
-	help
-	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
-	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
-	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
-	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
-	  Fast TLB refill support, etc.
-
-	  This option enable those enhancements which are not probed at run
-	  time. If you want a generic kernel to run on all Loongson 3 machines,
-	  please say 'N' here. If you want a high-performance kernel to run on
-	  new Loongson-3 machines only, please say 'Y' here.
-
-config CPU_LOONGSON3_WORKAROUNDS
-	bool "Loongson-3 LLSC Workarounds"
-	default y if SMP
-	depends on CPU_LOONGSON64
-	help
-	  Loongson-3 processors have the llsc issues which require workarounds.
-	  Without workarounds the system may hang unexpectedly.
-
-	  Say Y, unless you know what you are doing.
-
-config CPU_LOONGSON3_CPUCFG_EMULATION
-	bool "Emulate the CPUCFG instruction on older Loongson cores"
-	default y
-	depends on CPU_LOONGSON64
-	help
-	  Loongson-3A R4 and newer have the CPUCFG instruction available for
-	  userland to query CPU capabilities, much like CPUID on x86. This
-	  option provides emulation of the instruction on older Loongson
-	  cores, back to Loongson-3A1000.
-
-	  If unsure, please say Y.
-
 config CPU_LOONGSON2E
 	bool "Loongson 2E"
 	depends on SYS_HAS_CPU_LOONGSON2E
@@ -1644,6 +1606,44 @@ config CPU_BMIPS
 
 endchoice
 
+config LOONGSON3_ENHANCEMENT
+	bool "New Loongson-3 CPU Enhancements"
+	default n
+	depends on CPU_LOONGSON64
+	help
+	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
+	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
+	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
+	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
+	  Fast TLB refill support, etc.
+
+	  This option enable those enhancements which are not probed at run
+	  time. If you want a generic kernel to run on all Loongson 3 machines,
+	  please say 'N' here. If you want a high-performance kernel to run on
+	  new Loongson-3 machines only, please say 'Y' here.
+
+config CPU_LOONGSON3_WORKAROUNDS
+	bool "Loongson-3 LLSC Workarounds"
+	default y if SMP
+	depends on CPU_LOONGSON64
+	help
+	  Loongson-3 processors have the llsc issues which require workarounds.
+	  Without workarounds the system may hang unexpectedly.
+
+	  Say Y, unless you know what you are doing.
+
+config CPU_LOONGSON3_CPUCFG_EMULATION
+	bool "Emulate the CPUCFG instruction on older Loongson cores"
+	default y
+	depends on CPU_LOONGSON64
+	help
+	  Loongson-3A R4 and newer have the CPUCFG instruction available for
+	  userland to query CPU capabilities, much like CPUID on x86. This
+	  option provides emulation of the instruction on older Loongson
+	  cores, back to Loongson-3A1000.
+
+	  If unsure, please say Y.
+
 config CPU_MIPS32_3_5_FEATURES
 	bool "MIPS32 Release 3.5 Features"
 	depends on SYS_HAS_CPU_MIPS32_R3_5
-- 
2.40.1

Re: [PATCH 1/1] MIPS: move unselectable entries out of the "CPU type" choice

[Jiaxun Yang]

在 2024/1/27 16:23, Masahiro Yamada 写道:
> Move the following entries out of the "CPU type" choice:
>
>   - LOONGSON3_ENHANCEMENT
>   - CPU_LOONGSON3_WORKAROUNDS
>   - CPU_LOONGSON3_CPUCFG_EMULATION
>
> These entries cannot be selected from the choice because they depend on
> CPU_LOONGSON64, which is also located in the same choice.
>
> In fact, Kconfig does not consider them as choice values because they
> become children of CPU_LOOONGSON64 due to the automatic submenu creation
> in menu_finalize().
>
> However, it is hard to understand this behavior unless you are familiar
> with the Kconfig internals.
>
> "choice" should contain only selectable entries.
>
> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

Thanks!
> ---
>
>   arch/mips/Kconfig | 76 +++++++++++++++++++++++------------------------
>   1 file changed, 38 insertions(+), 38 deletions(-)
>
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 797ae590ebdb..a70b4f959fb1 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -1269,44 +1269,6 @@ config CPU_LOONGSON64
>   	  3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>   	  Loongson-2E/2F is not covered here and will be removed in future.
>   
> -config LOONGSON3_ENHANCEMENT
> -	bool "New Loongson-3 CPU Enhancements"
> -	default n
> -	depends on CPU_LOONGSON64
> -	help
> -	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
> -	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
> -	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
> -	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
> -	  Fast TLB refill support, etc.
> -
> -	  This option enable those enhancements which are not probed at run
> -	  time. If you want a generic kernel to run on all Loongson 3 machines,
> -	  please say 'N' here. If you want a high-performance kernel to run on
> -	  new Loongson-3 machines only, please say 'Y' here.
> -
> -config CPU_LOONGSON3_WORKAROUNDS
> -	bool "Loongson-3 LLSC Workarounds"
> -	default y if SMP
> -	depends on CPU_LOONGSON64
> -	help
> -	  Loongson-3 processors have the llsc issues which require workarounds.
> -	  Without workarounds the system may hang unexpectedly.
> -
> -	  Say Y, unless you know what you are doing.
> -
> -config CPU_LOONGSON3_CPUCFG_EMULATION
> -	bool "Emulate the CPUCFG instruction on older Loongson cores"
> -	default y
> -	depends on CPU_LOONGSON64
> -	help
> -	  Loongson-3A R4 and newer have the CPUCFG instruction available for
> -	  userland to query CPU capabilities, much like CPUID on x86. This
> -	  option provides emulation of the instruction on older Loongson
> -	  cores, back to Loongson-3A1000.
> -
> -	  If unsure, please say Y.
> -
>   config CPU_LOONGSON2E
>   	bool "Loongson 2E"
>   	depends on SYS_HAS_CPU_LOONGSON2E
> @@ -1644,6 +1606,44 @@ config CPU_BMIPS
>   
>   endchoice
>   
> +config LOONGSON3_ENHANCEMENT
> +	bool "New Loongson-3 CPU Enhancements"
> +	default n
> +	depends on CPU_LOONGSON64
> +	help
> +	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
> +	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
> +	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
> +	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
> +	  Fast TLB refill support, etc.
> +
> +	  This option enable those enhancements which are not probed at run
> +	  time. If you want a generic kernel to run on all Loongson 3 machines,
> +	  please say 'N' here. If you want a high-performance kernel to run on
> +	  new Loongson-3 machines only, please say 'Y' here.
> +
> +config CPU_LOONGSON3_WORKAROUNDS
> +	bool "Loongson-3 LLSC Workarounds"
> +	default y if SMP
> +	depends on CPU_LOONGSON64
> +	help
> +	  Loongson-3 processors have the llsc issues which require workarounds.
> +	  Without workarounds the system may hang unexpectedly.
> +
> +	  Say Y, unless you know what you are doing.
> +
> +config CPU_LOONGSON3_CPUCFG_EMULATION
> +	bool "Emulate the CPUCFG instruction on older Loongson cores"
> +	default y
> +	depends on CPU_LOONGSON64
> +	help
> +	  Loongson-3A R4 and newer have the CPUCFG instruction available for
> +	  userland to query CPU capabilities, much like CPUID on x86. This
> +	  option provides emulation of the instruction on older Loongson
> +	  cores, back to Loongson-3A1000.
> +
> +	  If unsure, please say Y.
> +
>   config CPU_MIPS32_3_5_FEATURES
>   	bool "MIPS32 Release 3.5 Features"
>   	depends on SYS_HAS_CPU_MIPS32_R3_5

-- 
---
Jiaxun Yang

Re: [PATCH 1/1] MIPS: move unselectable entries out of the "CPU type" choice

[Thomas Bogendoerfer]

On Sun, Jan 28, 2024 at 01:23:09AM +0900, Masahiro Yamada wrote:
> Move the following entries out of the "CPU type" choice:
> 
>  - LOONGSON3_ENHANCEMENT
>  - CPU_LOONGSON3_WORKAROUNDS
>  - CPU_LOONGSON3_CPUCFG_EMULATION
> 
> These entries cannot be selected from the choice because they depend on
> CPU_LOONGSON64, which is also located in the same choice.
> 
> In fact, Kconfig does not consider them as choice values because they
> become children of CPU_LOOONGSON64 due to the automatic submenu creation
> in menu_finalize().
> 
> However, it is hard to understand this behavior unless you are familiar
> with the Kconfig internals.
> 
> "choice" should contain only selectable entries.
> 
> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
> ---
> 
>  arch/mips/Kconfig | 76 +++++++++++++++++++++++------------------------
>  1 file changed, 38 insertions(+), 38 deletions(-)

applied to mips-next.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]