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Wed, 12 Jun 2024 04:54:37 -0400 (EDT) From: Jiaxun Yang Date: Wed, 12 Jun 2024 09:54:31 +0100 Subject: [PATCH v2 4/7] MIPS: csrc-r4k: Don't register as sched_clock if unfit Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240612-mips-clks-v2-4-a57e6f49f3db@flygoat.com> References: <20240612-mips-clks-v2-0-a57e6f49f3db@flygoat.com> In-Reply-To: <20240612-mips-clks-v2-0-a57e6f49f3db@flygoat.com> To: Thomas Bogendoerfer , Serge Semin , Daniel Lezcano , Thomas Gleixner Cc: "Maciej W. Rozycki" , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1593; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=ck/0wmFfxcf8nADSXP1DJNBzmOLr1sy9OsInITDxgf4=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrTMJHdBa7sNZxQzuWbv/H6td+PF/EvrzQPtdb5eTlu72 jxxQ96tjlIWBjEuBlkxRZYQAaW+DY0XF1x/kPUHZg4rE8gQBi5OAZiI4kuG/87V4v+/Rf3dX3fY Ii/qhb3dP6mPGSl3Dq5+mvzTIJBrWQIjw6M8/YstsVbf1hwW+rY/odpE2eHxKhnlJavPS4TrLhX WYgYA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 When we have more than one CPU in system, counter synchronisation overhead can lead to a scenario that sched_clock goes backward when being read from different CPUs. This is accommodated by CONFIG_HAVE_UNSTABLE_SCHED_CLOCK, but it's unavailable on 32bit kernel. We don't want to risk sched_clock correctness, so if we have multiple CPU in system and CONFIG_HAVE_UNSTABLE_SCHED_CLOCK is not set, we just don't use counter as sched_clock source. Signed-off-by: Jiaxun Yang --- arch/mips/kernel/csrc-r4k.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c index 055747a7417d..bdb1fa8931f4 100644 --- a/arch/mips/kernel/csrc-r4k.c +++ b/arch/mips/kernel/csrc-r4k.c @@ -68,6 +68,18 @@ static bool rdhwr_count_usable(void) return false; } +static inline __init bool count_can_be_sched_clock(void) +{ + if (IS_ENABLED(CONFIG_CPU_FREQ)) + return false; + + if (num_possible_cpus() > 1 && + !IS_ENABLED(CONFIG_HAVE_UNSTABLE_SCHED_CLOCK)) + return false; + + return true; +} + #ifdef CONFIG_CPU_FREQ static bool __read_mostly r4k_clock_unstable; @@ -125,9 +137,8 @@ int __init init_r4k_clocksource(void) clocksource_register_hz(&clocksource_mips, mips_hpt_frequency); -#ifndef CONFIG_CPU_FREQ - sched_clock_register(r4k_read_sched_clock, 32, mips_hpt_frequency); -#endif + if (count_can_be_sched_clock()) + sched_clock_register(r4k_read_sched_clock, 32, mips_hpt_frequency); return 0; } -- 2.43.0