From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Florian Fainelli <florian.fainelli@broadcom.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@broadcom.com>,
Huacai Chen <chenhuacai@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Serge Semin <fancer.lancer@gmail.com>,
Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: [PATCH v5 03/10] MIPS: smp: Provide platform IPI virq & domain hooks
Date: Sun, 08 Sep 2024 11:20:14 +0100 [thread overview]
Message-ID: <20240908-b4-mips-ipi-improvements-v5-3-be8617dd2e53@flygoat.com> (raw)
In-Reply-To: <20240908-b4-mips-ipi-improvements-v5-0-be8617dd2e53@flygoat.com>
Provide platform virq & domain hooks to allow platform
interrupt controllers or SMP code to override IPI interrupt
allocation.
This is required by ipi-mux, the API is aligned with RISC-V
and Arm.
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
arch/mips/include/asm/ipi.h | 17 ++++++++++
arch/mips/kernel/smp.c | 78 +++++++++++++++++++++++++--------------------
2 files changed, 61 insertions(+), 34 deletions(-)
diff --git a/arch/mips/include/asm/ipi.h b/arch/mips/include/asm/ipi.h
index 88b507339f51..7cac0f4ccf37 100644
--- a/arch/mips/include/asm/ipi.h
+++ b/arch/mips/include/asm/ipi.h
@@ -2,6 +2,7 @@
#include <linux/cpumask.h>
#include <linux/interrupt.h>
+#include <linux/irqdomain.h>
#ifndef __ASM_IPI_H
#define __ASM_IPI_H
@@ -32,6 +33,9 @@ int mips_smp_ipi_free(const struct cpumask *mask);
void mips_smp_ipi_enable(void);
void mips_smp_ipi_disable(void);
+extern bool mips_smp_ipi_have_virq_range(void);
+void mips_smp_ipi_set_irqdomain(struct irq_domain *d);
+extern void mips_smp_ipi_set_virq_range(int virq, int nr);
#else
static inline void mips_smp_ipi_enable(void)
{
@@ -41,5 +45,18 @@ static inline void mips_smp_ipi_disable(void)
{
}
#endif /* CONFIG_GENERIC_IRQ_IPI */
+#else
+static inline void mips_smp_ipi_set_virq_range(int virq, int nr)
+{
+}
+
+static inline void mips_smp_ipi_set_irqdomain(struct irq_domain *d)
+{
+}
+
+static inline bool mips_smp_ipi_have_virq_range(void)
+{
+ return false;
+}
#endif /* CONFIG_SMP */
#endif
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 9918bf341ffd..d3c7486fee3d 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -189,6 +189,7 @@ irq_handler_t ipi_handlers[IPI_MAX] __read_mostly = {
static DEFINE_PER_CPU_READ_MOSTLY(int, ipi_dummy_dev);
static int ipi_virqs[IPI_MAX] __ro_after_init;
static struct irq_desc *ipi_desc[IPI_MAX] __read_mostly;
+static struct irq_domain *ipidomain;
void mips_smp_send_ipi_single(int cpu, enum ipi_message_type op)
{
@@ -255,11 +256,12 @@ static void smp_ipi_init_one(unsigned int virq, const char *name,
int mips_smp_ipi_allocate(const struct cpumask *mask)
{
int virq, i;
- struct irq_domain *ipidomain;
struct device_node *node;
- node = of_irq_find_parent(of_root);
- ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
+ if (!ipidomain) {
+ node = of_irq_find_parent(of_root);
+ ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
+ }
/*
* Some platforms have half DT setup. So if we found irq node but
@@ -291,43 +293,15 @@ int mips_smp_ipi_allocate(const struct cpumask *mask)
ipi_virqs[i] = virq;
}
- if (irq_domain_is_ipi_per_cpu(ipidomain)) {
- int cpu;
-
- for_each_cpu(cpu, mask) {
- for (i = 0; i < IPI_MAX; i++) {
- smp_ipi_init_one(ipi_virqs[i] + cpu, ipi_names[i],
- ipi_handlers[i]);
- }
- }
- } else {
- for (i = 0; i < IPI_MAX; i++) {
- smp_ipi_init_one(ipi_virqs[i], ipi_names[i],
- ipi_handlers[i]);
- }
- }
-
return 0;
}
int mips_smp_ipi_free(const struct cpumask *mask)
{
int i;
- struct irq_domain *ipidomain;
- struct device_node *node;
-
- node = of_irq_find_parent(of_root);
- ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
-
- /*
- * Some platforms have half DT setup. So if we found irq node but
- * didn't find an ipidomain, try to search for one that is not in the
- * DT.
- */
- if (node && !ipidomain)
- ipidomain = irq_find_matching_host(NULL, DOMAIN_BUS_IPI);
- BUG_ON(!ipidomain);
+ if (!ipidomain)
+ return -ENODEV;
if (irq_domain_is_ipi_per_cpu(ipidomain)) {
int cpu;
@@ -344,6 +318,25 @@ int mips_smp_ipi_free(const struct cpumask *mask)
return 0;
}
+void mips_smp_ipi_set_virq_range(int virq, int nr)
+{
+ int i;
+
+ WARN_ON(nr < IPI_MAX);
+
+ for (i = 0; i < IPI_MAX; i++)
+ ipi_virqs[i] = virq + i;
+}
+
+void mips_smp_ipi_set_irqdomain(struct irq_domain *d)
+{
+ ipidomain = d;
+}
+
+bool mips_smp_ipi_have_virq_range(void)
+{
+ return ipi_virqs[0];
+}
static int __init mips_smp_ipi_init(void)
{
@@ -352,7 +345,24 @@ static int __init mips_smp_ipi_init(void)
if (num_possible_cpus() == 1)
return 0;
- mips_smp_ipi_allocate(cpu_possible_mask);
+ if (!mips_smp_ipi_have_virq_range())
+ mips_smp_ipi_allocate(cpu_possible_mask);
+
+ if (ipidomain && irq_domain_is_ipi_per_cpu(ipidomain)) {
+ int cpu;
+
+ for_each_possible_cpu(cpu) {
+ for (i = 0; i < IPI_MAX; i++) {
+ smp_ipi_init_one(ipi_virqs[i] + cpu, ipi_names[i],
+ ipi_handlers[i]);
+ }
+ }
+ } else {
+ for (i = 0; i < IPI_MAX; i++) {
+ smp_ipi_init_one(ipi_virqs[i], ipi_names[i],
+ ipi_handlers[i]);
+ }
+ }
for (i = 0; i < IPI_MAX; i++) {
ipi_desc[i] = irq_to_desc(ipi_virqs[i]);
--
2.46.0
next prev parent reply other threads:[~2024-09-08 10:20 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-08 10:20 [PATCH v5 00/10] MIPS: IPI Improvements Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 01/10] MIPS: smp: Make IPI interrupts scalable Jiaxun Yang
2024-09-12 3:47 ` Florian Fainelli
2024-09-08 10:20 ` [PATCH v5 02/10] MIPS: smp: Manage IPI interrupts as percpu_devid interrupts Jiaxun Yang
2024-09-08 10:20 ` Jiaxun Yang [this message]
2024-09-08 10:20 ` [PATCH v5 04/10] MIPS: Move mips_smp_ipi_init call after prepare_cpus Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 05/10] MIPS: smp: Implement IPI stats Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 06/10] irqchip/irq-mips-gic: Switch to ipi_mux Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 07/10] MIPS: Implement get_mips_sw_int hook Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 08/10] MIPS: GIC: Implement get_sw_int hook Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 09/10] irqchip/irq-mips-cpu: Rework software IRQ handling flow Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 10/10] MIPS: smp-mt: Rework IPI functions Jiaxun Yang
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