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From: Sergey Matsievskiy <matsievskiysv@gmail.com>
To: tglx@linutronix.de
Cc: maz@kernel.org, alexandre.belloni@bootlin.com,
	gregory.clement@bootlin.com, lars.povlsen@microchip.com,
	UNGLinuxDriver@microchip.com, linux-mips@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Sergey Matsievskiy <matsievskiysv@gmail.com>
Subject: [PATCH 1/2] irqchip/ocelot: Fix trigger register address
Date: Wed, 25 Sep 2024 21:44:15 +0300	[thread overview]
Message-ID: <20240925184416.54204-2-matsievskiysv@gmail.com> (raw)
In-Reply-To: <20240925184416.54204-1-matsievskiysv@gmail.com>

Use main interrupt trigger registers instead of device interrupt trigger
registers.

Controllers, supported by this driver, have two sets of registers:
* (main) interrupt registers control peripheral interrupt sources;
* device interrupt registers configure per-device (network interface)
interrupts and act as an extra stage before the main interrupt registers.

In the driver unmask code, device trigger registers are used in the mask
calculation of the main interrupt sticky register, mixing two kinds of
registers. Use main interrupt trigger register instead.

Signed-off-by: Sergey Matsievskiy <matsievskiysv@gmail.com>
---
 drivers/irqchip/irq-mscc-ocelot.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-mscc-ocelot.c b/drivers/irqchip/irq-mscc-ocelot.c
index 4d0c3532dbe7..c19ab379e8c5 100644
--- a/drivers/irqchip/irq-mscc-ocelot.c
+++ b/drivers/irqchip/irq-mscc-ocelot.c
@@ -37,7 +37,7 @@ static struct chip_props ocelot_props = {
 	.reg_off_ena_clr	= 0x1c,
 	.reg_off_ena_set	= 0x20,
 	.reg_off_ident		= 0x38,
-	.reg_off_trigger	= 0x5c,
+	.reg_off_trigger	= 0x4,
 	.n_irq			= 24,
 };
 
@@ -70,7 +70,7 @@ static struct chip_props jaguar2_props = {
 	.reg_off_ena_clr	= 0x1c,
 	.reg_off_ena_set	= 0x20,
 	.reg_off_ident		= 0x38,
-	.reg_off_trigger	= 0x5c,
+	.reg_off_trigger	= 0x4,
 	.n_irq			= 29,
 };
 
-- 
2.39.2


  reply	other threads:[~2024-09-25 18:44 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-25 18:44 [PATCH 0/2] irqchip/ocelot: Fix trigger register address Sergey Matsievskiy
2024-09-25 18:44 ` Sergey Matsievskiy [this message]
2024-09-25 18:44 ` [PATCH 2/2] irqchip/ocelot: Comment sticky register clearing code Sergey Matsievskiy

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