[now with correct Cc] [RFC] weirdness in "MIPS: ptrace: introduce NT_MIPS_MSA regset"

[now with correct Cc] [RFC] weirdness in "MIPS: ptrace: introduce NT_MIPS_MSA regset"

[Al Viro]

	Both msa_get() and msa_set() have very odd logics:

	} else if (sizeof(target->thread.fpu.fpr[0]) == regset->size) {

and

	if (sizeof(target->thread.fpu.fpr[0]) == regset->size) {

resp.

These instances occur in mips_regsets[REGSET_MSA] and in mips64_regsets[REGSET_MSA]
and both have ->size set to 16.  Fair enough, we are dealing with 128bit elements.

Now, the type of target->thread.fpu.fpr[0] is always union fpureg, i.e.

union fpureg {
        __u32   val32[FPU_REG_WIDTH / 32];
	__u64   val64[FPU_REG_WIDTH / 64];
};

and both members have the same size - FPU_REG_WIDTH / 8, now as well as at the
time this commit went in.  FPU_REG_WIDTH definition, now as then, is
#ifdef CONFIG_CPU_HAS_MSA
# define FPU_REG_WIDTH  128
#else
# define FPU_REG_WIDTH  64
#endif

Both msa_get() and msa_set() are under ifdef CONFIG_CPU_HAS_MSA.  In other words,
they are only going to be compiled if FPU_REG_WIDTH is 128 and sizeof(union fpreg)
is 16.

So it looks like both checks are constant true.  What am I missing here?

Re: [now with correct Cc] [RFC] weirdness in "MIPS: ptrace: introduce NT_MIPS_MSA regset"

[Maciej W. Rozycki]

On Sun, 24 Nov 2024, Al Viro wrote:

> 	Both msa_get() and msa_set() have very odd logics:
> 
> 	} else if (sizeof(target->thread.fpu.fpr[0]) == regset->size) {
> 
> and
> 
> 	if (sizeof(target->thread.fpu.fpr[0]) == regset->size) {
> 
> resp.
[...]
> So it looks like both checks are constant true.  What am I missing here?

 FWIW ISTM these are leftovers from an earlier version or suchlike.  
FAOD I haven't had anything to do with this code so this is based solely 
on visual inspection.  Also no MSA hardware available here to verify 
anything (but QEMU might do).  HTH.

  Maciej