From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 926AB32D441; Thu, 7 May 2026 07:34:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778139271; cv=none; b=jvX3q1HHpXVWAZIjstxa36EofSH5PTBBKN8l0mNI9u8OwzpJscof/h71hB4Z9Z6fSuDq/eNZtvVINmMEHW9obbMA/puQsayer4EsiHFnFMUXrUKFeoiZd+rlh/jjE8TNLLkWmJk0pLo+MeV5pAXQ8+eLz5ATSL/IZDlWUSDt8T4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778139271; c=relaxed/simple; bh=1BWhZEj5wjEI7Zr/301s1oCCVafsmJSbsyZyk7tgBVY=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ICwJ73KkuQcllhpENonG/TVuUd2d6lgCnyesfhvYxpLlbukAv5uAsO7rp5HeRSQ1clwRnURvnWTgQzJMQgRb4xn92KTGbNjzyJC10nW6qEvYlhdzdtQjv7MqBNIEvF/XsKBd5m+yo1sy0p7xvnDywIKsNwOxJaJrdFMVH6mlk2A= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=sEOC+Yt3; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=ht4P6rCC; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="sEOC+Yt3"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="ht4P6rCC" Date: Thu, 7 May 2026 09:34:27 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1778139269; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=M3TFmwYRSkODm0VVYgNgy2av15i1ufVLpD3DudaLP68=; b=sEOC+Yt3SWpyUKymT/rHCeyQseEYPHvMRgZmEYF7nDvQJr24oizHsPz8c+ZoW7tNFDB5++ 76CiZA17dIJBZUSyXwl9YRjy4lmPmzAl2tHQ+p+62BGvijbzxZ1c2wdWbou+ldqLk1Kcis o/DnUaLNNbk5XFdsYvldugno6Lxtys+qC+xd2xez5J02iCaaR3AH5oouPwYxRNf+jZAQei wOSbvCqS7e3rNEkrpuIHlvHXYDNoIuybl8cFSOodNunYGDGX6wAm8RXKo1ahyAk8VdtOoQ Xv7gDZai2y9pS88XDqEu3aiwDyW8lO8bNkCdtarQ1tz/XmsWfFCozKrF603eEA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1778139269; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=M3TFmwYRSkODm0VVYgNgy2av15i1ufVLpD3DudaLP68=; b=ht4P6rCCDd4KXzUXl3WNOk6Js8oA2jdpMMT7z/gSSj0NkVWvit3nZO6R07jMYiKzvKRQS+ nNC/9qyBm2az7RCQ== From: Sebastian Andrzej Siewior To: "Maciej W. Rozycki" Cc: netdev@vger.kernel.org, linux-mips@vger.kernel.org, Jakub Kicinski , Andrew Lunn , "David S. Miller" , Eric Dumazet , Paolo Abeni Subject: Re: [PATCH net-next v2] declance: Remove IRQF_ONESHOT Message-ID: <20260507073427.atoJ5zsY@linutronix.de> References: <20260127165430.7ui_LGkg@linutronix.de> <20260505072954.Ov2t-FGt@linutronix.de> <20260505123203.jifiaxEL@linutronix.de> <20260505152450.1KYVS2pr@linutronix.de> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: On 2026-05-06 10:25:02 [+0100], Maciej W. Rozycki wrote: > On Tue, 5 May 2026, Sebastian Andrzej Siewior wrote: >=20 > > I'm not if sure if you may need to change the primary handler if the > > interrupt flow is EOI and cascading based on what you wrote. If you have > > access to the HW then you it should be easy to test given the > > `threadirqs' argument should expose problems. >=20 > The interrupt is exceedingly rare, I've only seen it actually fire maybe= =20 > a dozen times across all my systems in 25+ years. It happens when there= =20 > is a memory read error on DMA, such as an uncorrected ECC or parity error= =20 > (depending on the system variant), or a bus timeout. I assumed you have other interrupts on that hw, cascaded/ operating the same way. But otherwise=E2=80=A6 > It should be possible to orchestrate it, such as by making the LANCE DMA= =20 > pointer register refer an unpopulated location in the system address map;= =20 > memory ECC errors can be induced too by the DRAM controller's diagnostic= =20 > feature. It seems enough hassle though I'd rather get things right by th= e=20 > spec. Oh, yeah. That should do it. > Thanks for the hint as to the `threadirqs' facility though, it may come= =20 > up helpful sometime. :) > Maciej Sebastian