From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.cjdns.fr (mail.cjdns.fr [5.135.140.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E21276025; Thu, 14 May 2026 00:06:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.135.140.105 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778717178; cv=none; b=R+UU8YOHU0/+ODIPkKHW+BGEWE1bT3bEetgVg5pnZoRvAymim0eR0i1wIK6hckbDEJAhWe4/yfT3uxNuLWaKiDZdJhWIPuKs0XJflDbSWI5cY5d7dcicN0TFuZDoE4mzGiq3YoZ4IFC+8+9AnPaGy6tFWNXdGIrzLRd6u0YJpBs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778717178; c=relaxed/simple; bh=FgG58eGhmlC/n7pbzl1OSAbZ0nk5KWnJCNVx2x8GEj8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=M7X63hcm7GD6QA33UOzwIchosjghb2Hb35VWO8mVId2h0dyori75JsPcGbepCxUXkj1vmwOLlAl+Jrow9Br1MyMUDuDpTePj6uAbvnWm+7k31pMj5qqpjagIoRv+fgLchs7LXP1/U+mMPACShkRQyWoBk+2eo01osC5do0CJFow= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr; spf=pass smtp.mailfrom=cjdns.fr; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b=T0VLhdAp; arc=none smtp.client-ip=5.135.140.105 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b="T0VLhdAp" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B5D543CC101; Thu, 14 May 2026 02:06:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cjdns.fr; s=dkim; t=1778717174; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=wXacb0n2TMynhlrS3dc3M2K/Xjj68GSTktVtpr2SWrY=; b=T0VLhdApP8X6xpIuM1owehSkVwOwKIUwk9jBnaC5WW7mhTBU43M0PIsEzKTAN+8+0qbyNe 00D7iF9Tvsn/p4AZ02+R5zaVZDgP8l2bSWWloInysHNGLfqP3QbrkHBUQ9LaPWQ5zBxr1h 0VspTuTAtOtjAjCRW6Dz5AFfblZ00fATPe0/HcT2GNiRvTRe9Xjs995aMmyqcANYkg5qyJ rvcVL+a38S72G/6DIuZ8tBNDfvUnPBqUUroHN5ONcCRyxd+JBkiBPZltUNtG21natr+phO 25G4oYmR6oOjjFtCakvLDTHRUnnl03fTHsqK72dwd/q4cnRInM1wHkgq2iP5Qw== From: Caleb James DeLisle To: linux-mips@vger.kernel.org Cc: conor+dt@kernel.org, daniel.lezcano@kernel.org, devicetree@vger.kernel.org, krzk+dt@kernel.org, linux-kernel@vger.kernel.org, naseefkm@gmail.com, robh@kernel.org, tglx@kernel.org, Caleb James DeLisle , Conor Dooley Subject: [PATCH v2 1/5] dt-bindings: timer: econet: Update EN751627 for multi-IRQ Date: Thu, 14 May 2026 00:05:57 +0000 Message-Id: <20260514000601.3430262-2-cjd@cjdns.fr> In-Reply-To: <20260514000601.3430262-1-cjd@cjdns.fr> References: <20260514000601.3430262-1-cjd@cjdns.fr> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 This hardware is found in the EN751221 SoC family as well as the EN751627. The former uses a percpu IRQ for all timers while the later uses an individual IRQ numbers per-timer. Signed-off-by: Caleb James DeLisle Acked-by: Conor Dooley --- .../bindings/timer/econet,en751221-timer.yaml | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml index c1e7c2b6afde..f338739e039c 100644 --- a/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml +++ b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml @@ -28,8 +28,8 @@ properties: maxItems: 2 interrupts: - maxItems: 1 - description: A percpu-devid timer interrupt shared across CPUs. + minItems: 1 + maxItems: 4 clocks: maxItems: 1 @@ -52,21 +52,31 @@ allOf: items: - description: VPE timers 0 and 1 - description: VPE timers 2 and 3 + interrupts: + description: An interrupt for each timer (one per VPE) + minItems: 4 else: properties: reg: items: - description: VPE timers 0 and 1 + interrupts: + description: A percpu-devid timer interrupt shared across timers + maxItems: 1 additionalProperties: false examples: - | + #include timer@1fbf0400 { compatible = "econet,en751627-timer", "econet,en751221-timer"; reg = <0x1fbf0400 0x100>, <0x1fbe0000 0x100>; interrupt-parent = <&intc>; - interrupts = <30>; + interrupts = , + , + , + ; clocks = <&hpt_clock>; }; - | -- 2.39.5