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[124.218.37.86]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2e300b4273csm5205745ad.64.2026.09.30.22.30.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2026 22:30:42 -0700 (PDT) From: Aristo Chen To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Aristo Chen Subject: [PATCH] MIPS: GT64120: Remove duplicate GT_PCI1M1LD_OFS and GT_PCI1M1HD_OFS Date: Thu, 1 Oct 2026 05:30:15 +0000 Message-ID: <20261001053016.76578-1-aristo.chen@canonical.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The GT_PCI1M1LD_OFS and GT_PCI1M1HD_OFS register offsets are defined twice in a row with identical values. Identical macro redefinitions are valid C, so the compiler never warned about it. Drop the second copy. No functional change. Signed-off-by: Aristo Chen --- arch/mips/include/asm/gt64120.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/mips/include/asm/gt64120.h b/arch/mips/include/asm/gt64120.h index 5d68d726598a..2ad770ff3c56 100644 --- a/arch/mips/include/asm/gt64120.h +++ b/arch/mips/include/asm/gt64120.h @@ -45,8 +45,6 @@ #define GT_PCI1M0HD_OFS 0x0a8 #define GT_PCI1M1LD_OFS 0x0b0 #define GT_PCI1M1HD_OFS 0x0b8 -#define GT_PCI1M1LD_OFS 0x0b0 -#define GT_PCI1M1HD_OFS 0x0b8 #define GT_SCS10AR_OFS 0x0d0 #define GT_SCS32AR_OFS 0x0d8 base-commit: f552e14f77bfce3e7ee0bb268ab023951baec3ff -- 2.53.0