From: Paul Boddie <paul@boddie.org.uk>
To: Paul Cercueil <paul@crapouillou.net>,
"H . Nikolaus Schaller" <hns@goldelico.com>
Cc: 周琰杰 <zhouyanjie@wanyeetech.com>, linux-mips <linux-mips@vger.kernel.org>
Subject: Re: [PATCH] clocksource: Ingenic: Add high resolution timer support for SMP.
Date: Thu, 21 May 2020 00:14:22 +0200 [thread overview]
Message-ID: <3077290.R152QTsmsV@jeremy> (raw)
In-Reply-To: <20200519201110.286501-1-paul@crapouillou.net>
On Tuesday 19. May 2020 22.11.10 Paul Cercueil wrote:
>
> I took the liberty to clean your patch so that it doesn't create a
> struct ingenic_tcu per CPU timer.
>
> Tested, and fully working on the JZ4770 with CONFIG_SMP disabled, and
> also with CONFIG_SMP enabled (even though JZ4770 has only one CPU) with
> a fixed smp.c and USB disabled (otherwise it crashes at boot).
Thanks for looking at this and also your continuing work with the DRM driver.
I'll try and look a bit more at the DRM driver for the JZ4780 and see what I
am doing wrong with regard to JZ4780-specific configuration. In principle,
there should not be any, but I don't really have the full picture (literally
and also in terms of documentation or understanding).
One thing that seems to be done with the Imagination/Ingenic drivers is dual
DMA channel initialisation. Usually, this seems to be necessary only for dual-
panel configurations, and I wonder whether there is some kind of requirement
for the same arrangement when using the HDMI output.
Another thing that is done involves setting a foreground, which might be
relevant to your more recent contributions adding IPU support. Again, I don't
really understand why this seems necessary, but the documentation hardly
provides any details that might explain it.
Paul
next prev parent reply other threads:[~2020-05-20 22:59 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-19 14:35 Introduce SMP support for CI20 (based on JZ4780) v8 周琰杰 (Zhou Yanjie)
2020-05-19 14:35 ` [PATCH v8 0/6] Introduce SMP support for CI20 (based on JZ4780) 周琰杰 (Zhou Yanjie)
2020-05-19 14:35 ` [PATCH v8 1/6] MIPS: JZ4780: Introduce SMP support 周琰杰 (Zhou Yanjie)
2020-05-19 16:09 ` Paul Cercueil
2020-05-20 7:24 ` Zhou Yanjie
2020-05-19 18:21 ` kbuild test robot
2020-05-19 19:41 ` Paul Cercueil
2020-05-20 7:23 ` Zhou Yanjie
2020-05-20 11:33 ` Paul Cercueil
2020-05-20 12:32 ` Jiaxun Yang
2020-05-19 14:35 ` [PATCH v8 2/6] MIPS: CI20: Modify DTS to support high resolution timer for SMP 周琰杰 (Zhou Yanjie)
2020-05-19 14:35 ` [PATCH v8 3/6] clocksource: Ingenic: Add high resolution timer support " 周琰杰 (Zhou Yanjie)
2020-05-19 17:42 ` Paul Cercueil
2020-05-19 20:11 ` [PATCH] " Paul Cercueil
2020-05-20 22:14 ` Paul Boddie [this message]
2020-05-22 12:26 ` Paul Cercueil
2020-05-22 19:16 ` Paul Boddie
2020-05-25 23:03 ` JZ4780 LCD controller initialisation (was Re: [PATCH] clocksource: Ingenic: Add high resolution timer support for SMP.) Paul Boddie
2020-05-26 4:48 ` H. Nikolaus Schaller
2020-05-26 15:03 ` Paul Cercueil
2020-05-26 22:44 ` Paul Boddie
2020-05-26 23:07 ` Paul Cercueil
2020-06-01 20:06 ` Paul Boddie
2020-06-23 21:28 ` Paul Boddie
2020-05-19 14:35 ` [PATCH v8 4/6] dt-bindings: MIPS: Document Ingenic SoCs binding 周琰杰 (Zhou Yanjie)
2020-05-26 19:29 ` Rob Herring
2020-05-27 5:59 ` Zhou Yanjie
2020-05-19 14:35 ` [PATCH v8 5/6] MIPS: Ingenic: Add 'cpus' node for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2020-09-10 7:52 ` H. Nikolaus Schaller
2020-09-12 6:17 ` Zhou Yanjie
2020-05-19 14:35 ` [PATCH v8 6/6] MIPS: CI20: Update defconfig to support SMP 周琰杰 (Zhou Yanjie)
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