From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8DB6C54FD3 for ; Wed, 25 Mar 2020 11:35:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 95E042078A for ; Wed, 25 Mar 2020 11:35:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1585136140; bh=hDdH6NzW082kdtiNJh6NcBX/8zpFKDBtBCPyNFL3akc=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=Ajiue7Nm/XEVs5K22QEHFUCT7PJZgxeJLrpS8ms5A251IFQ8aSS0IXusXg5LgSQHs BIRXRINOWOmCLS7R/4fVho/flhPIPDfzok1qxmf3J9yIn+N6vvIjmNmfA8cClCP0oZ DpHuhlXO4estsIpD0eugNmuS0eqiVBS5eJIG7kt4= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727381AbgCYLfi (ORCPT ); Wed, 25 Mar 2020 07:35:38 -0400 Received: from mail.kernel.org ([198.145.29.99]:50462 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726805AbgCYLfh (ORCPT ); Wed, 25 Mar 2020 07:35:37 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EA7AF20722; Wed, 25 Mar 2020 11:35:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1585136136; bh=hDdH6NzW082kdtiNJh6NcBX/8zpFKDBtBCPyNFL3akc=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Q7GoJqppdtvNHQJdM0XE9y8P+ki1AutLvirfSEQTn6FrAdVzJZHPIwqIDKhFlg2Q0 Tkrvk1QDhThLTbgftm+MddcYEzlZs3PpQ+Y2cnZ+0BK9mRoxAcy45dF3s/9fBv6nq4 7736pvMud3vI8wyuEoiF/EqEkM+W6ffESuahi3Lw= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1jH4Jq-00FYG3-87; Wed, 25 Mar 2020 11:35:34 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Date: Wed, 25 Mar 2020 11:35:34 +0000 From: Marc Zyngier To: Paul Cercueil Cc: Jiaxun Yang , linux-mips@vger.kernel.org, Huacai Chen , Thomas Gleixner , Jason Cooper , Rob Herring , Mark Rutland , Thomas Bogendoerfer , Jonathan Corbet , John Crispin , Matthias Brugger , Jean Delvare , "David S. Miller" , Mauro Carvalho Chehab , Jonathan Cameron , Greg Kroah-Hartman , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Miquel Raynal , Andi Kleen , "H. Nikolaus Schaller" , "Eric W. Biederman" , Tiezhu Yang , Yinglu Yang , Allison Randal , Bartlomiej Zolnierkiewicz , Paul Burton , Manuel Lauss , Serge Semin , Matt Redfearn , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-ide@vger.kernel.org Subject: Re: [PATCH v7 01/12] irqchip: Add driver for Loongson I/O Local Interrupt Controller In-Reply-To: References: <20200325022916.106641-1-jiaxun.yang@flygoat.com> <20200325022916.106641-2-jiaxun.yang@flygoat.com> Message-ID: <30bbde289a0cc4c1bfc0d3f6475f8f3e@kernel.org> X-Sender: maz@kernel.org User-Agent: Roundcube Webmail/1.3.10 X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: paul@crapouillou.net, jiaxun.yang@flygoat.com, linux-mips@vger.kernel.org, chenhc@lemote.com, tglx@linutronix.de, jason@lakedaemon.net, robh+dt@kernel.org, mark.rutland@arm.com, tsbogend@alpha.franken.de, corbet@lwn.net, john@phrozen.org, matthias.bgg@gmail.com, jdelvare@suse.com, davem@davemloft.net, mchehab+samsung@kernel.org, Jonathan.Cameron@huawei.com, gregkh@linuxfoundation.org, andriy.shevchenko@linux.intel.com, geert+renesas@glider.be, krzk@kernel.org, miquel.raynal@bootlin.com, ak@linux.intel.com, hns@goldelico.com, ebiederm@xmission.com, yangtiezhu@loongson.cn, yangyinglu@loongson.cn, allison@lohutok.net, b.zolnierkie@samsung.com, paulburton@kernel.org, manuel.lauss@gmail.com, fancer.lancer@gmail.com, matt.redfearn@mips.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-ide@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org On 2020-03-25 11:25, Paul Cercueil wrote: > Hi Jiaxun, > > > Le mer. 25 mars 2020 à 10:28, Jiaxun Yang a > écrit : >> This controller appeared on Loongson family of chips as the primary >> package interrupt source. >> >> Signed-off-by: Jiaxun Yang >> Co-developed-by: Huacai Chen >> Signed-off-by: Huacai Chen >> Reviewed-by: Marc Zyngier >> --- >> v4-v5: >> Resolve suggestions from maz: >> - Remove DT validation >> - Simplify unnucessary functions & variables >> --- >> drivers/irqchip/Kconfig | 9 + >> drivers/irqchip/Makefile | 1 + >> drivers/irqchip/irq-loongson-liointc.c | 261 >> +++++++++++++++++++++++++ >> 3 files changed, 271 insertions(+) >> create mode 100644 drivers/irqchip/irq-loongson-liointc.c >> >> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig >> index 6d397732138d..c609eaa319d2 100644 >> --- a/drivers/irqchip/Kconfig >> +++ b/drivers/irqchip/Kconfig >> @@ -513,4 +513,13 @@ config EXYNOS_IRQ_COMBINER >> Say yes here to add support for the IRQ combiner devices embedded >> in Samsung Exynos chips. >> >> +config LOONGSON_LIOINTC >> + bool "Loongson Local I/O Interrupt Controller" >> + depends on MACH_LOONGSON64 >> + default y >> + select IRQ_DOMAIN >> + select GENERIC_IRQ_CHIP >> + help >> + Support for the Loongson Local I/O Interrupt Controller. >> + >> endmenu >> diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile >> index eae0d78cbf22..5e7678efdfe6 100644 >> --- a/drivers/irqchip/Makefile >> +++ b/drivers/irqchip/Makefile >> @@ -105,3 +105,4 @@ obj-$(CONFIG_MADERA_IRQ) += irq-madera.o >> obj-$(CONFIG_LS1X_IRQ) += irq-ls1x.o >> obj-$(CONFIG_TI_SCI_INTR_IRQCHIP) += irq-ti-sci-intr.o >> obj-$(CONFIG_TI_SCI_INTA_IRQCHIP) += irq-ti-sci-inta.o >> +obj-$(CONFIG_LOONGSON_LIOINTC) += irq-loongson-liointc.o >> diff --git a/drivers/irqchip/irq-loongson-liointc.c >> b/drivers/irqchip/irq-loongson-liointc.c >> new file mode 100644 >> index 000000000000..18de2c09ece4 >> --- /dev/null >> +++ b/drivers/irqchip/irq-loongson-liointc.c >> @@ -0,0 +1,261 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Copyright (C) 2020, Jiaxun Yang >> + * Loongson Local IO Interrupt Controller support >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#include >> + >> +#define LIOINTC_CHIP_IRQ 32 >> +#define LIOINTC_NUM_PARENT 4 >> + >> +#define LIOINTC_INTC_CHIP_START 0x20 >> + >> +#define LIOINTC_REG_INTC_STATUS (LIOINTC_INTC_CHIP_START + 0x20) >> +#define LIOINTC_REG_INTC_EN_STATUS (LIOINTC_INTC_CHIP_START + 0x04) >> +#define LIOINTC_REG_INTC_ENABLE (LIOINTC_INTC_CHIP_START + 0x08) >> +#define LIOINTC_REG_INTC_DISABLE (LIOINTC_INTC_CHIP_START + 0x0c) >> +#define LIOINTC_REG_INTC_POL (LIOINTC_INTC_CHIP_START + 0x10) >> +#define LIOINTC_REG_INTC_EDGE (LIOINTC_INTC_CHIP_START + 0x14) >> + >> +#define LIOINTC_SHIFT_INTx 4 >> + >> +struct liointc_handler_data { >> + struct liointc_priv *priv; >> + u32 parent_int_map; >> +}; >> + >> +struct liointc_priv { >> + struct irq_chip_generic *gc; >> + struct liointc_handler_data handler[LIOINTC_NUM_PARENT]; >> + u8 map_cache[LIOINTC_CHIP_IRQ]; >> +}; >> + >> +static void liointc_chained_handle_irq(struct irq_desc *desc) >> +{ >> + struct liointc_handler_data *handler = >> irq_desc_get_handler_data(desc); >> + struct irq_chip *chip = irq_desc_get_chip(desc); >> + struct irq_chip_generic *gc = handler->priv->gc; >> + u32 pending; >> + >> + chained_irq_enter(chip, desc); >> + >> + pending = readl(gc->reg_base + LIOINTC_REG_INTC_STATUS); >> + >> + if (!pending) >> + spurious_interrupt(); >> + >> + while (pending) { >> + int bit = __ffs(pending); >> + >> + generic_handle_irq(irq_find_mapping(gc->domain, bit)); >> + pending &= ~BIT(bit); >> + } > > Consider using the for_each_set_bit() macro from . > See drivers/irqchip/irq-ingenic-tcu.c for instance. which would require changing the pending type to be unsigned long. Open-coding these if fine if it helps keeping the type system consistent. M. -- Jazz is not dead. It just smells funny...