From mboxrd@z Thu Jan 1 00:00:00 1970 Received: by oss.sgi.com id ; Wed, 2 Aug 2000 14:52:14 -0700 Received: from deliverator.sgi.com ([204.94.214.10]:20788 "EHLO deliverator.sgi.com") by oss.sgi.com with ESMTP id ; Wed, 2 Aug 2000 14:51:38 -0700 Received: from cthulhu.engr.sgi.com (cthulhu.engr.sgi.com [192.26.80.2]) by deliverator.sgi.com (980309.SGI.8.8.8-aspam-6.2/980310.SGI-aspam) via ESMTP id OAA20421 for ; Wed, 2 Aug 2000 14:43:34 -0700 (PDT) mail_from (jsun@mvista.com) Received: from sgi.com (sgi.engr.sgi.com [192.26.80.37]) by cthulhu.engr.sgi.com (980427.SGI.8.8.8/970903.SGI.AUTOCF) via ESMTP id OAA99309 for ; Wed, 2 Aug 2000 14:50:50 -0700 (PDT) mail_from (jsun@mvista.com) Received: from hermes.mvista.com (gateway-490.mvista.com [63.192.220.206]) by sgi.com (980327.SGI.8.8.8-aspam/980304.SGI-aspam: SGI does not authorize the use of its proprietary systems or networks for unsolicited or bulk email from the Internet.) via ESMTP id OAA04469 for ; Wed, 2 Aug 2000 14:50:39 -0700 (PDT) mail_from (jsun@mvista.com) Received: from mvista.com (IDENT:jsun@orion.mvista.com [10.0.0.75]) by hermes.mvista.com (8.9.3/8.9.3) with ESMTP id OAA26491; Wed, 2 Aug 2000 14:50:19 -0700 Message-ID: <3988979B.D264F549@mvista.com> Date: Wed, 02 Aug 2000 14:50:19 -0700 From: Jun Sun X-Mailer: Mozilla 4.7 [en] (X11; I; Linux 2.2.12-20b i586) X-Accept-Language: en MIME-Version: 1.0 To: "Kevin D. Kissell" CC: linux@cthulhu.engr.sgi.com, linux-mips@fnet.fr, ralf@oss.sgi.com Subject: Re: PROPOSAL : multi-way cache support in Linux/MIPS References: <01ac01bffcad$a767c240$0deca8c0@Ulysses> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Sender: owner-linux-mips@oss.sgi.com Precedence: bulk Return-Path: X-Orcpt: rfc822;linux-mips-outgoing "Kevin D. Kissell" wrote: > It's possible to write code that is compatible with an R4000 but > not MIPS32, and vice versa, but they are 99% identical. > Kevin, Is that possible you can list the 1% difference here? I have always been confused by MIPS32/MIPS64 vs R3000/R4000/etc. (And on top of it, there is also MIPS I, II, III, IV, etc...). I am sure I am not the only one. If you can give an pointer that will clarify names, that would be good too. Jun