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Date:   Tue, 23 Jan 2001 16:26:35 -0700
From:   Quinn Jensen <jensenq@Lineo.COM>
Organization: Lineo, Inc.
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Ralf,

On some machines with weird firmware (e.g. IDT 334 board)
the processor comes up with the cache already enabled for
kseg0.  In this case, the set_cp0_config() call in mips32.c
to turn off the cache (gated by CONFIG_MIPS_UNCACHED) should
probably come after the first call to flush_cache_all(),
which is safer but still not totally safe, I suppose.
Or am I totally hosed trying to turn the kseg0 cache off
after it was once on?

Quinn Jensen