From: Alice Hennessy <ahennessy@mvista.com>
To: Carsten Langgaard <carstenl@mips.com>
Cc: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>,
ralf@oss.sgi.com, ajob4me@21cn.com, linux-mips@oss.sgi.com
Subject: Re: Toshiba TX3927 board boot problem.
Date: Mon, 29 Oct 2001 16:17:23 -0800 [thread overview]
Message-ID: <3BDDF193.B6405A7F@mvista.com> (raw)
In-Reply-To: 3BDD140E.432D795B@mips.com
Carsten Langgaard wrote:
> This doesn't look right, you still need to enable the CU1 bit in the status register to let the FP
> emulator kick-in.
> FPU-less CPUs should take a coprocessor unusable exception on any floating-point instructions.
> I have been running this on several FPU-less CPUs, and it works fine for me.
Maybe the FPU-less CPUs you have been using define the CU1 bit as reserved
or is unused (ignore on write, zero on read)? The TX3927 actually allows the setting of the CU1 bit.
Have you seen
a case where you need to set the CU1 bit for the emulation to kick-in? I would think that the CU1
bit should
never be set to one for FPU-less CPUs.
Alice
>
>
> Actually there is a problem with this code on CPUs, which have a FPU. The problem is that a lot of
> CPUs have a CP0 hazard of 4 nops, between setting the CU1 bit in the status register and executing
> the first floating point instruction thereafter. It probably only a performance issue, because if
> the setting of CU1 hasn't taken effect yet, then we get a coprocessor unusable exception and the
> the exception handler will also set the CU1 bit.
>
> /Carsten
>
> Atsushi Nemoto wrote:
>
> > >>>>> On Fri, 26 Oct 2001 22:58:06 +0900 (JST), Atsushi Nemoto <nemoto@toshiba-tops.co.jp> said:
> > nemoto> I have seen TX39 dead on "cfc1" insturuction if STATUS.CU1 bit
> > nemoto> enabled. Such codes were in arch/mips/kernel/process.c.
> >
> > So, please apply this patch to CVS for TX39XX support.
> >
> > I use CONFIG_CPU_TX39XX in this patch, but I suppose other FPU-less
> > CPUs may need this also.
> >
> > Does anybody know how about on other CPUs?
> >
> > diff -u linux-sgi-cvs/arch/mips/kernel/process.c linux.new/arch/mips/kernel/
> > --- linux-sgi-cvs/arch/mips/kernel/process.c Mon Oct 22 10:29:56 2001
> > +++ linux.new/arch/mips/kernel/process.c Mon Oct 29 15:49:37 2001
> > @@ -57,6 +57,12 @@
> > {
> > /* Forget lazy fpu state */
> > if (last_task_used_math == current) {
> > +#ifdef CONFIG_CPU_TX39XX
> > + if (!(mips_cpu.options & MIPS_CPU_FPU)) {
> > + last_task_used_math = NULL;
> > + return;
> > + }
> > +#endif
> > set_cp0_status(ST0_CU1);
> > __asm__ __volatile__("cfc1\t$0,$31");
> > last_task_used_math = NULL;
> > @@ -67,6 +73,12 @@
> > {
> > /* Forget lazy fpu state */
> > if (last_task_used_math == current) {
> > +#ifdef CONFIG_CPU_TX39XX
> > + if (!(mips_cpu.options & MIPS_CPU_FPU)) {
> > + last_task_used_math = NULL;
> > + return;
> > + }
> > +#endif
> > set_cp0_status(ST0_CU1);
> > __asm__ __volatile__("cfc1\t$0,$31");
> > last_task_used_math = NULL;
> > ---
> > Atsushi Nemoto
>
> --
> _ _ ____ ___ Carsten Langgaard Mailto:carstenl@mips.com
> |\ /|||___)(___ MIPS Denmark Direct: +45 4486 5527
> | \/ ||| ____) Lautrupvang 4B Switch: +45 4486 5555
> TECHNOLOGIES 2750 Ballerup Fax...: +45 4486 5556
> Denmark http://www.mips.com
next prev parent reply other threads:[~2001-10-30 0:17 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20011026095319.1C4BBB474@topsms.toshiba-tops.co.jp>
2001-10-26 13:58 ` Toshiba TX3927 board boot problem Atsushi Nemoto
2001-10-29 7:02 ` Atsushi Nemoto
2001-10-29 8:32 ` Carsten Langgaard
2001-10-30 0:17 ` Alice Hennessy [this message]
2001-10-30 0:32 ` Ralf Baechle
2001-10-30 2:25 ` Alice Hennessy
2001-10-30 8:36 ` Carsten Langgaard
2001-10-30 14:13 ` Ralf Baechle
2001-10-30 14:17 ` Carsten Langgaard
2001-10-30 3:14 ` Atsushi Nemoto
2001-10-30 8:20 ` Carsten Langgaard
2001-10-30 14:55 ` Ralf Baechle
2001-10-31 2:58 ` Atsushi Nemoto
2001-10-31 4:06 ` Ralf Baechle
2001-10-31 4:30 ` Atsushi Nemoto
2001-10-31 4:31 ` Ralf Baechle
2001-10-31 5:07 ` Daniel Jacobowitz
2001-10-26 9:49 8route
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