From: Carsten Langgaard <carstenl@mips.com>
To: Andre.Messerschmidt@infineon.com
Cc: linux-mips@oss.sgi.com
Subject: Re: Wait instruction on 5kc
Date: Wed, 27 Feb 2002 19:24:52 +0100 [thread overview]
Message-ID: <3C7D2474.6A2F3CA2@mips.com> (raw)
In-Reply-To: 86048F07C015D311864100902760F1DD01B5E73C@dlfw003a.dus.infineon.com
Andre.Messerschmidt@infineon.com wrote:
> Hi.
>
> Is there a patch available for the wait instruction bug in the 5kc (RTL
> Revision >= 2.1)?
It's been fixed in RTL revision >=2.3.
>
> As a hack I changed it to nop (in r4k_wait() ), but I believe there is a
> clever solution for this.
You can remove CPU_5KC from the case statement in check_wait in the file
arch/mips/kernel/setup.c
>
> regards
> --
> Andre Messerschmidt
>
> Application Engineer
> Infineon Technologies AG
next prev parent reply other threads:[~2002-02-27 19:23 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-02-27 15:02 Wait instruction on 5kc Andre.Messerschmidt
2002-02-27 18:24 ` Carsten Langgaard [this message]
2002-02-28 11:38 ` Ralf Baechle
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