Index: processor.h
===================================================================
RCS file: /home/cvs/linux/include/asm-mips/processor.h,v
retrieving revision 1.43.2.11
diff -u -r1.43.2.11 processor.h
--- processor.h	7 Apr 2003 02:21:05 -0000	1.43.2.11
+++ processor.h	7 Apr 2003 13:03:07 -0000
@@ -66,14 +66,9 @@
 	struct cache_desc tcache;	/* Tertiary/split secondary cache */
 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
 
-/*
- * Assumption: Options of CPU 0 are a superset of all processors.
- * This is true for all known MIPS systems.
- */
-#define cpu_has_watch	(test_bit(MIPS_CPU_WATCH, cpu_data[0].options))
-
 extern struct cpuinfo_mips cpu_data[];
-#define current_cpu_data cpu_data[smp_processor_id()]
+#define current_cpu_data	cpu_data[smp_processor_id()]
+#define cpu_has_watch		(current_cpu_data.options & MIPS_CPU_WATCH)
 
 /*
  * System setup and hardware flags..