Re: IRQ problem on cobalt / 2.6.6

[Peter Horton <phorton@bitbox.co.uk>]

Ralf Baechle wrote:

>On Sun, May 16, 2004 at 05:21:13PM +0200, Johannes Stezenbach wrote:
>
>  
>
>>In essence, I believe something other than the saa7146 must be asserting
>>irq 23.  Or is it possible that a bug in the PCI init stuff in
>>saa7146_core.c can
>>cause this? Any hints how we could debug this would be welcome.
>>    
>>
>
>arch/mips/cobalt/irq.c:cobalt_irq() looks pretty suspect.  It connects
>CAUSEF_IP7 and interrupt 23 - but the CPU's builtin count / compare
>interrupt already uses this bit.
>
>Sharing the timer interrupt with something else isn't impossible but seems
>a less than bright thing to do.  Somebody with production hw to test
>should compare this interrupt dispatch function with old working code
>from 2.2 or 2.4 ...
>
>  
>

I've got no hardware here but the code looks roughly similiar

As the Cobalt's use Galileo timer 0 for clock interrupts we could use 
Galileo rather than count/compare for the HPT.

Precision would be 50MHz rather than 125MHz but that shouldn't be a 
problem :-)

P.