Re: do_ri failure in cache flushing routines

[Pete Popov <ppopov@mvista.com>]

Pete Popov wrote:

> G H wrote:
>
>> I've not had much response to this question so I would like to 
>> rephrase it :
>>  
>> Can anyone think of any possible scenario where do_ri could occur in 
>> blast_icache32() ??
>>  
>> Is this possibly a cache synchronisation problem ??
>>  
>
>
> Could be a hardware memory glitch. I would use kgdb to put a 
> breakpoint there and see what the data in memory looks like when this 
> happens -- look for memory corruption, etc.

Another thought, what other stress testing have you done on your board? 
Does it complete a full native kernel compile without crashing?

Pete

>
> Pete
>
>> TIA
>>  
>> >While testing out an amd au1500 based board I have been getting " 
>> do_ri " exceptions >that always occur in the cache flushing routines. 
>> More often than not in >blast_icache_32().
>>  
>> >So far this has mainly happened after running the board for days on 
>> end while running >multiple telnet sessions to it. It has sometimes ( 
>> quite rarely ) happened after a few >hours to a day of multiple 
>> telnet session use.
>>
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>
>