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From: Nyauyama <ichinoh@mb.neweb.ne.jp>
To: linux-mips@linux-mips.org
Cc: Nyauyama <ichinoh@mb.neweb.ne.jp>
Subject: QUESTION YAMON's uart3 of au1100
Date: Sun, 16 Jan 2005 11:24:07 +0900	[thread overview]
Message-ID: <41E9D047.4010603@mb.neweb.ne.jp> (raw)

Hello!

I have a question about initialization of YAMON's uart3 of au1100.
BFC00000(BOOTLOC) is read by processing delay3.
Why BFC00000?


#define BOOTLOC (*(volatile unsigned int *)0xbfc00000)
int delay3(int n)
{
int i, j, v;
for( i = 0; i < n; ++i )
{
for( j = 0; j < 1000; ++j )
v += BOOTLOC;
}
return v;
}
void init_uart3()
{
uart3.uart_module_control = UART_CE; // disable the module, enable the
clocks
delay3(100); // 100 ms delay
uart3.uart_module_control = UART_CE | UART_ME; // enable the module
delay3(100); // delay another 100 ms
uart3.uart_interrupt_enable = 0; // disable interrupts
uart3.uart_fifo_control = UART_TR | UART_RR; // reset the receiver and
transmitter
uart3.uart_line_control = UART_WORD_8 | UART_NO_PARITY | UART_STOP_1;
uart3.uart_clock_divider = 156;
setbrg3(396000000,2); // set baud rate for default cpu clock
delay3(100);
}

Regards,
Nyauyama.

             reply	other threads:[~2005-01-16  2:24 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-01-16  2:24 Nyauyama [this message]
2005-01-16  3:01 ` QUESTION YAMON's uart3 of au1100 Pete Popov
2005-01-16  9:35   ` Nyauyama

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