From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jun 2008 19:41:40 +0100 (BST) Received: from mail.codesourcery.com ([65.74.133.4]:43740 "EHLO mail.codesourcery.com") by ftp.linux-mips.org with ESMTP id S20038523AbYFKSli (ORCPT ); Wed, 11 Jun 2008 19:41:38 +0100 Received: (qmail 20200 invoked from network); 11 Jun 2008 18:41:34 -0000 Received: from unknown (HELO mbp.local) (maxim@127.0.0.2) by mail.codesourcery.com with ESMTPA; 11 Jun 2008 18:41:34 -0000 Message-ID: <48501C55.5060602@codesourcery.com> Date: Wed, 11 Jun 2008 22:41:25 +0400 From: Maxim Kuvyrkov User-Agent: Thunderbird 2.0.0.14 (Macintosh/20080421) MIME-Version: 1.0 To: "Maciej W. Rozycki" , Ralf Baechle , gcc-patches@gcc.gnu.org, linux-mips@linux-mips.org, rdsandiford@googlemail.com Subject: Re: Changing the treatment of the MIPS HI and LO registers References: <87tzgj4nh6.fsf@firetop.home> <87abib4d9t.fsf@firetop.home> <87r6bm1ebd.fsf@firetop.home> <878wxtvarg.fsf@firetop.home> <8763stz2p3.fsf@firetop.home> <87zlpuxqfb.fsf@firetop.home> In-Reply-To: <87zlpuxqfb.fsf@firetop.home> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 19485 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: maxim@codesourcery.com Precedence: bulk X-list: linux-mips Richard Sandiford wrote: ... > +
  • The MIPS port no longer recognizes the h > + asm constraint. It was necessary to remove > + this constraint in order to avoid generating unpredictable > + code sequences. > + > +

    One of the main uses of the h constraint > + was to extract the high part of a multiplication on > + 64-bit targets. For example:

    > +
    > +    asm ("dmultu\t%1,%2" : "=h" (result) : "r" (x), "r" (y));
    > +

    You can now achieve the same effect using 128-bit types:

    > +
    > +    typedef unsigned int uint128_t __attribute__((mode(TI)));
    > +    result = ((uint128_t) x * y) >> 64;
    > +

    The second sequence is better in many ways. For example, > + if x and y are constants, the > + compiler can perform the multiplication at compile time. > + If x and y are not constants, > + the compiler can schedule the runtime multiplication > + better than it can schedule an asm statement.

    > +
  • > Hi, GLIBC contains the following code in stdlib/longlong.h: #if defined (__mips__) && W_TYPE_SIZE == 32 #define umul_ppmm(w1, w0, u, v) \ __asm__ ("multu %2,%3" \ : "=l" ((USItype) (w0)), \ "=h" ((USItype) (w1)) \ : "d" ((USItype) (u)), \ "d" ((USItype) (v))) #define UMUL_TIME 10 #define UDIV_TIME 100 #endif /* __mips__ */ What would be a correct fix in this case? Something like this: #define umul_ppmm(w1, w0, u, v) \ ({unsigned int __attribute__((mode(DI))) __xx; \ __xx = (unsigned int __attribute__((mode(DI)))) u * v; \ w0 = __xx & ((1 << 32) - 1); \ w1 = __xx >> 32;}) Or is there a better way? Thanks, Maxim