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Message-ID: <48505EAC.6050404@gnu.org>
Date:	Wed, 11 Jun 2008 16:24:28 -0700
From:	Paolo Bonzini <bonzini@gnu.org>
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To:	Maxim Kuvyrkov <maxim@codesourcery.com>
CC:	"Maciej W. Rozycki" <macro@linux-mips.org>,
	Ralf Baechle <ralf@linux-mips.org>, gcc-patches@gcc.gnu.org,
	linux-mips@linux-mips.org, rdsandiford@googlemail.com
Subject: Re: Changing the treatment of the MIPS HI and LO registers
References: <87tzgj4nh6.fsf@firetop.home> 	<Pine.LNX.4.55.0805272134540.18833@cliff.in.clinika.pl> 	<87abib4d9t.fsf@firetop.home> 	<Pine.LNX.4.55.0805272357020.18833@cliff.in.clinika.pl> 	<87r6bm1ebd.fsf@firetop.home> 	<Pine.LNX.4.55.0805290213140.29522@cliff.in.clinika.pl> 	<878wxtvarg.fsf@firetop.home> <8763stz2p3.fsf@firetop.home> <87zlpuxqfb.fsf@firetop.home> <48501C55.5060602@codesourcery.com>
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> GLIBC contains the following code in stdlib/longlong.h:
> <snip>
> #if defined (__mips__) && W_TYPE_SIZE == 32
> #define umul_ppmm(w1, w0, u, v) \
>   __asm__ ("multu %2,%3"                        \
>        : "=l" ((USItype) (w0)),                    \
>          "=h" ((USItype) (w1))                    \
>        : "d" ((USItype) (u)),                    \
>          "d" ((USItype) (v)))
> #define UMUL_TIME 10
> #define UDIV_TIME 100
> #endif /* __mips__ */
> </snip>

Actually, so does GCC itself.  Can you prepare a patch?

> What would be a correct fix in this case?  Something like this:
> <snip>
> #define umul_ppmm(w1, w0, u, v)                    \
>   ({unsigned int __attribute__((mode(DI))) __xx;        \
>     __xx = (unsigned int __attribute__((mode(DI)))) u * v;    \
>     w0 = __xx & ((1 << 32) - 1);                \
>     w1 = __xx >> 32;})
> </snip>
> 
> Or is there a better way?

Almost; this:

#define umul_ppmm(w1, w0, u, v)  \
   ({UDWtype __xx;       	 \
     UWtype __u = (u), __v = (v); \
     __xx = (UDWtype) __u * __v;  \
     w0 = (UWtype) __xx;          \
     w1 = __xx >> 32;})

should work.

Paolo