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Date:	Tue, 25 Nov 2008 15:23:48 -0800
From:	David Daney <ddaney@caviumnetworks.com>
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To:	Manuel Lauss <mano@roarinelk.homelinux.net>
CC:	LMO <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH v2] Alchemy: cpu feature override constants.
References: <20081125231230.GA10366@roarinelk.homelinux.net>
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Manuel Lauss wrote:
[...]
> +#define cpu_has_tlb		1
> +#define cpu_has_4kex		1
> +#define cpu_has_3k_cache	0
> +#define cpu_has_4k_cache	1
> +#define cpu_has_tx39_cache	0
> +#define cpu_has_fpu		0
> +#define cpu_has_32fpr		0
> +#define cpu_has_counter		1
> +#define cpu_has_watch		1
> +#define cpu_has_divec		1
> +#define cpu_has_vce		0
> +#define cpu_has_cache_cdex_p	0
> +#define cpu_has_cache_cdex_s	0
> +#define cpu_has_mcheck		1
> +#define cpu_has_ejtag		1
> +#define cpu_has_llsc		1
> +#define cpu_has_mips16		0
> +#define cpu_has_mdmx		0
> +#define cpu_has_mips3d		0
> +#define cpu_has_smartmips	0
> +#define cpu_has_vtag_icache	0
> +#define cpu_has_dc_aliases	0
> +#define cpu_has_ic_fills_f_dc	1
> +#define cpu_has_pindexed_cache	0
> +#define cpu_has_mips32r1	1
> +#define cpu_has_mips32r2	0
> +#define cpu_has_mips64r1	0
> +#define cpu_has_mips64r2	0
> +#define cpu_has_dsp		0
> +#define cpu_has_mipsmt		0
> +#define cpu_has_userlocal	0
> +#define cpu_has_nofpuex		0
> +#define cpu_has_64bits		0
> +#define cpu_has_64bit_zero_reg	0
> +#define cpu_has_vint		0
> +#define cpu_has_veic		0
> +#define cpu_has_inclusive_pcaches 0
> +
> +#define cpu_dcache_line_size()	32
> +#define cpu_icache_line_size()  32

The probe routines in cpu-probe.c should get at least some of that 
correct.  How about just overriding the things that cpu-probe.c doesn't 
get right?

David Daney