From: Nils Faerber <nils.faerber@kernelconcepts.de>
To: linux-mips@linux-mips.org
Subject: Re: Ingenic JZ4730 - illegal instruction
Date: Mon, 09 Mar 2009 17:26:42 +0100 [thread overview]
Message-ID: <49B54342.8070004@kernelconcepts.de> (raw)
In-Reply-To: <49B53987.8020206@paralogos.com>
Kevin D. Kissell schrieb:
> Nils Faerber wrote:
>> Kevin D. Kissell schrieb:
>>> Are you sure that the JZ_RISC section is in fact the version of those
>>> functions that's being built into your kernel?
>> Well, there is CONFIG_JZRISC=y in the kernel .config and a
>> switch(current_cpu_type) { case CPU_JZRISC: ...} so I would assume it is
>> being used. But I will verify that the CONFIG_JZRISC=y is correctly
>> translated into a current_cpu_type.
> Your assumption is reasonable. But given that things aren't working,
> yes, it's good to verify.
It should be proper - it is as I can see set by cpu_probe.
>> Oh, one last question, in order to rule out the cache as bug-spot would
>> the kernel option "run uncached" "solve" the issue (and be darn slow)?
> It would certainly solve the issue, and would *probably* result in a
> system that would be fully functional but slow. Very high end and very
It is *very* slow - you can almost watch every single instruction ;)
> low end systems can be rendered unusable by forcing uncached operation,
> but it's certainly worth a try. Also, if your cache control logic
It seems to run - I am still stuck at the GUI login screen, everything
is so darn slow now. Testing for he fault could take ages now, a game of
patience it seems ;)
> supports both write-back and write-through operation, if you set the
> default cache "attribute" for kernel and page tables (which is
> essentially what you're doing under-the-hood when you configure for
> uncached operation) to write-through, that should cure the problems with
> copying text pages, but *not* those with re-using them, with less
> performance impact. I'd be a little surprised if the Ingenic part
> offered both modes, though.
The really bad thing is that I do not have the full datasheet to the CPU
so I basically have no idea what this thing really supports or not. So I
can only try and test. Luckily this is just a toy project and not a
commecial contract work (which I would not have accepted without proper
documentation).
PS: Login is done now and I suddenly see apps initialisiing that
obviously silently failed before - so I am pretty sure now that uncached
does work, which means that the cache handling has the bug I am looking for.
> Regards,
> Kevin K.
Cheers
nils faerber
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prev parent reply other threads:[~2009-03-09 16:26 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-03-06 16:36 Ingenic JZ4730 - illegal instruction Nils Faerber
2009-03-08 14:53 ` Markus Gothe
2009-03-08 16:03 ` ard
2009-03-10 17:12 ` Markus Gothe
2009-03-09 8:39 ` Kevin D. Kissell
2009-03-09 10:00 ` Nils Faerber
2009-03-09 14:12 ` Kevin D. Kissell
2009-03-09 15:05 ` Nils Faerber
2009-03-09 15:45 ` Kevin D. Kissell
2009-03-09 16:26 ` Nils Faerber [this message]
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