[PATCH 0/2] New hardware RNG for Octeon SOCs (v2)

[David Daney <ddaney@caviumnetworks.com>]

Based on feedback from AKPM, I have a new revision of the Octeon
hardware RNG driver.

The changes from v1 are minor, just eliminating some bogus casting by
accessing the driver state by embedding struct hwrng in the driver
data, which is now accessed with the container_of() trick.

The first patch adds some port definitions and the octeon_rng platform
device.  The second is the driver.

Since Octeon is a mips port, we might want to merge both patches via
Ralf's linux-mips.org tree.

David Daney (2):
   MIPS: Octeon:  Add hardware RNG platform device.
   hw_random: Add hardware RNG for Octeon SOCs.

  arch/mips/cavium-octeon/setup.c              |   43 ++++++++
  arch/mips/include/asm/octeon/cvmx-rnm-defs.h |   88 +++++++++++++++
  drivers/char/hw_random/Kconfig               |   13 +++
  drivers/char/hw_random/Makefile              |    1 +
  drivers/char/hw_random/octeon-rng.c          |  147 
++++++++++++++++++++++++++
  5 files changed, 292 insertions(+), 0 deletions(-)
  create mode 100644 arch/mips/include/asm/octeon/cvmx-rnm-defs.h
  create mode 100644 drivers/char/hw_random/octeon-rng.c