From: Chris Dearman <chris@mips.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Subject: Re: [PATCH] Avoid potential hazard on Context register
Date: Sun, 11 Oct 2009 13:26:58 -0700 [thread overview]
Message-ID: <4AD23F92.8030902@mips.com> (raw)
In-Reply-To: <20091011145330.GA23369@linux-mips.org>
Ralf Baechle wrote:
> There is no hazard barrier between writes to c0_context and subsequent
> read accesses. This is a fairly theoretical hole as c0_context is only
> written on CPU bootup and other, unrelated code will almost certainly
It was actually in the bootup code where I saw the problem, and this
patch doesn't deal with that case:
> MTC0 zero, CP0_CONTEXT # clear context register
> PTR_LA $28, init_thread_union
> /* Set the SP after an empty pt_regs. */
> PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE
> PTR_ADDU sp, $28
> back_to_back_c0_hazard
> set_saved_sp sp, t0, t1
The problem I observed is that the Context valuse used by set_saved_sp
is whatever it inherits from YAMON.
Chris
--
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MIPS Technologies Inc 955 East Arques Ave, Sunnyvale CA 94085
next prev parent reply other threads:[~2009-10-11 20:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-10-11 6:07 [PATCH] Avoid potential hazard on Context register Chris Dearman
2009-10-11 13:39 ` Ralf Baechle
2009-10-11 14:53 ` Ralf Baechle
2009-10-11 20:26 ` Chris Dearman [this message]
2009-10-12 3:20 ` Ralf Baechle
2009-10-11 20:05 ` Chris Dearman
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