[PATCH 1/3] MIPS: Alchemy: use runtime cpu detection in GPIO code.

[PATCH 1/3] MIPS: Alchemy: use runtime cpu detection in GPIO code.

[Manuel Lauss]

From: Manuel Lauss <mlau@msc-ge.com>

Remove the cpu subtype cpp macros in favor of runtime detection,
to improve compile coverage of the alchemy common code.
(Increases kernel size by 700 bytes).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
 arch/mips/alchemy/common/gpiolib-au1000.c       |   10 +--
 arch/mips/include/asm/mach-au1x00/gpio-au1000.h |   90 ++++++++++++-----------
 2 files changed, 51 insertions(+), 49 deletions(-)

diff --git a/arch/mips/alchemy/common/gpiolib-au1000.c b/arch/mips/alchemy/common/gpiolib-au1000.c
index 1bfa91f..c8e1a94 100644
--- a/arch/mips/alchemy/common/gpiolib-au1000.c
+++ b/arch/mips/alchemy/common/gpiolib-au1000.c
@@ -36,7 +36,6 @@
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/gpio.h>
 
-#if !defined(CONFIG_SOC_AU1000)
 static int gpio2_get(struct gpio_chip *chip, unsigned offset)
 {
 	return alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE);
@@ -63,7 +62,7 @@ static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset)
 {
 	return alchemy_gpio2_to_irq(offset + ALCHEMY_GPIO2_BASE);
 }
-#endif /* !defined(CONFIG_SOC_AU1000) */
+
 
 static int gpio1_get(struct gpio_chip *chip, unsigned offset)
 {
@@ -104,7 +103,6 @@ struct gpio_chip alchemy_gpio_chip[] = {
 		.base			= ALCHEMY_GPIO1_BASE,
 		.ngpio			= ALCHEMY_GPIO1_NUM,
 	},
-#if !defined(CONFIG_SOC_AU1000)
 	[1] = {
 		.label                  = "alchemy-gpio2",
 		.direction_input        = gpio2_direction_input,
@@ -115,15 +113,13 @@ struct gpio_chip alchemy_gpio_chip[] = {
 		.base                   = ALCHEMY_GPIO2_BASE,
 		.ngpio                  = ALCHEMY_GPIO2_NUM,
 	},
-#endif
 };
 
 static int __init alchemy_gpiolib_init(void)
 {
 	gpiochip_add(&alchemy_gpio_chip[0]);
-#if !defined(CONFIG_SOC_AU1000)
-	gpiochip_add(&alchemy_gpio_chip[1]);
-#endif
+	if (alchemy_get_cputype() != ALCHEMY_CPU_AU1000)
+		gpiochip_add(&alchemy_gpio_chip[1]);
 
 	return 0;
 }
diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
index 9cf32d9..62d2f13 100644
--- a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
@@ -236,19 +236,19 @@ static inline int alchemy_gpio1_is_valid(int gpio)
 
 static inline int alchemy_gpio1_to_irq(int gpio)
 {
-#if defined(CONFIG_SOC_AU1000)
-	return au1000_gpio1_to_irq(gpio);
-#elif defined(CONFIG_SOC_AU1100)
-	return au1100_gpio1_to_irq(gpio);
-#elif defined(CONFIG_SOC_AU1500)
-	return au1500_gpio1_to_irq(gpio);
-#elif defined(CONFIG_SOC_AU1550)
-	return au1550_gpio1_to_irq(gpio);
-#elif defined(CONFIG_SOC_AU1200)
-	return au1200_gpio1_to_irq(gpio);
-#else
+	switch (alchemy_get_cputype()) {
+	case ALCHEMY_CPU_AU1000:
+		return au1000_gpio1_to_irq(gpio);
+	case ALCHEMY_CPU_AU1100:
+		return au1100_gpio1_to_irq(gpio);
+	case ALCHEMY_CPU_AU1500:
+		return au1500_gpio1_to_irq(gpio);
+	case ALCHEMY_CPU_AU1550:
+		return au1550_gpio1_to_irq(gpio);
+	case ALCHEMY_CPU_AU1200:
+		return au1200_gpio1_to_irq(gpio);
+	}
 	return -ENXIO;
-#endif
 }
 
 /*
@@ -306,19 +306,19 @@ static inline int alchemy_gpio2_is_valid(int gpio)
 
 static inline int alchemy_gpio2_to_irq(int gpio)
 {
-#if defined(CONFIG_SOC_AU1000)
-	return au1000_gpio2_to_irq(gpio);
-#elif defined(CONFIG_SOC_AU1100)
-	return au1100_gpio2_to_irq(gpio);
-#elif defined(CONFIG_SOC_AU1500)
-	return au1500_gpio2_to_irq(gpio);
-#elif defined(CONFIG_SOC_AU1550)
-	return au1550_gpio2_to_irq(gpio);
-#elif defined(CONFIG_SOC_AU1200)
-	return au1200_gpio2_to_irq(gpio);
-#else
+	switch (alchemy_get_cputype()) {
+	case ALCHEMY_CPU_AU1000:
+		return au1000_gpio2_to_irq(gpio);
+	case ALCHEMY_CPU_AU1100:
+		return au1100_gpio2_to_irq(gpio);
+	case ALCHEMY_CPU_AU1500:
+		return au1500_gpio2_to_irq(gpio);
+	case ALCHEMY_CPU_AU1550:
+		return au1550_gpio2_to_irq(gpio);
+	case ALCHEMY_CPU_AU1200:
+		return au1200_gpio2_to_irq(gpio);
+	}
 	return -ENXIO;
-#endif
 }
 
 /**********************************************************************/
@@ -374,10 +374,13 @@ static inline void alchemy_gpio2_enable_int(int gpio2)
 
 	gpio2 -= ALCHEMY_GPIO2_BASE;
 
-#if defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500)
 	/* Au1100/Au1500 have GPIO208-215 enable bits at 0..7 */
-	gpio2 -= 8;
-#endif
+	switch (alchemy_get_cputype()) {
+	case ALCHEMY_CPU_AU1100:
+	case ALCHEMY_CPU_AU1500:
+		gpio2 -= 8;
+	}
+
 	local_irq_save(flags);
 	__alchemy_gpio2_mod_int(gpio2, 1);
 	local_irq_restore(flags);
@@ -395,10 +398,13 @@ static inline void alchemy_gpio2_disable_int(int gpio2)
 
 	gpio2 -= ALCHEMY_GPIO2_BASE;
 
-#if defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500)
 	/* Au1100/Au1500 have GPIO208-215 enable bits at 0..7 */
-	gpio2 -= 8;
-#endif
+	switch (alchemy_get_cputype()) {
+	case ALCHEMY_CPU_AU1100:
+	case ALCHEMY_CPU_AU1500:
+		gpio2 -= 8;
+	}
+
 	local_irq_save(flags);
 	__alchemy_gpio2_mod_int(gpio2, 0);
 	local_irq_restore(flags);
@@ -484,19 +490,19 @@ static inline int alchemy_gpio_to_irq(int gpio)
 
 static inline int alchemy_irq_to_gpio(int irq)
 {
-#if defined(CONFIG_SOC_AU1000)
-	return au1000_irq_to_gpio(irq);
-#elif defined(CONFIG_SOC_AU1100)
-	return au1100_irq_to_gpio(irq);
-#elif defined(CONFIG_SOC_AU1500)
-	return au1500_irq_to_gpio(irq);
-#elif defined(CONFIG_SOC_AU1550)
-	return au1550_irq_to_gpio(irq);
-#elif defined(CONFIG_SOC_AU1200)
-	return au1200_irq_to_gpio(irq);
-#else
+	switch (alchemy_get_cputype()) {
+	case ALCHEMY_CPU_AU1000:
+		return au1000_irq_to_gpio(irq);
+	case ALCHEMY_CPU_AU1100:
+		return au1100_irq_to_gpio(irq);
+	case ALCHEMY_CPU_AU1500:
+		return au1500_irq_to_gpio(irq);
+	case ALCHEMY_CPU_AU1550:
+		return au1550_irq_to_gpio(irq);
+	case ALCHEMY_CPU_AU1200:
+		return au1200_irq_to_gpio(irq);
+	}
 	return -ENXIO;
-#endif
 }
 
 /**********************************************************************/
-- 
1.6.5.3

[PATCH 2/3] MIPS: Alchemy: Only build AU1000 INTC code for compatible cpus

[Manuel Lauss]

Use the GPIO config symbol to only build Au1000 interrupt code on
chips with compatible hw.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
 arch/mips/alchemy/Kconfig                |   14 +++++++-------
 arch/mips/alchemy/common/Makefile        |    6 ++++--
 arch/mips/include/asm/mach-au1x00/gpio.h |    2 +-
 3 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index 22f4ff5..df3b1a7 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -1,5 +1,5 @@
-# au1000-style gpio
-config ALCHEMY_GPIO_AU1000
+# au1000-style gpio and interrupt controllers
+config ALCHEMY_GPIOINT_AU1000
 	bool
 
 # select this in your board config if you don't want to use the gpio
@@ -133,27 +133,27 @@ endchoice
 config SOC_AU1000
 	bool
 	select SOC_AU1X00
-	select ALCHEMY_GPIO_AU1000
+	select ALCHEMY_GPIOINT_AU1000
 
 config SOC_AU1100
 	bool
 	select SOC_AU1X00
-	select ALCHEMY_GPIO_AU1000
+	select ALCHEMY_GPIOINT_AU1000
 
 config SOC_AU1500
 	bool
 	select SOC_AU1X00
-	select ALCHEMY_GPIO_AU1000
+	select ALCHEMY_GPIOINT_AU1000
 
 config SOC_AU1550
 	bool
 	select SOC_AU1X00
-	select ALCHEMY_GPIO_AU1000
+	select ALCHEMY_GPIOINT_AU1000
 
 config SOC_AU1200
 	bool
 	select SOC_AU1X00
-	select ALCHEMY_GPIO_AU1000
+	select ALCHEMY_GPIOINT_AU1000
 
 config SOC_AU1X00
 	bool
diff --git a/arch/mips/alchemy/common/Makefile b/arch/mips/alchemy/common/Makefile
index abf0eb1..f46b351 100644
--- a/arch/mips/alchemy/common/Makefile
+++ b/arch/mips/alchemy/common/Makefile
@@ -5,14 +5,16 @@
 # Makefile for the Alchemy Au1xx0 CPUs, generic files.
 #
 
-obj-y += prom.o irq.o time.o reset.o \
+obj-y += prom.o time.o reset.o \
 	clocks.o platform.o power.o setup.o \
 	sleeper.o dma.o dbdma.o
 
+obj-$(CONFIG_ALCHEMY_GPIOINT_AU1000) += irq.o
+
 # optional gpiolib support
 ifeq ($(CONFIG_ALCHEMY_GPIO_INDIRECT),)
  ifeq ($(CONFIG_GPIOLIB),y)
-  obj-$(CONFIG_ALCHEMY_GPIO_AU1000) += gpiolib-au1000.o
+  obj-$(CONFIG_ALCHEMY_GPIOINT_AU1000) += gpiolib-au1000.o
  endif
 endif
 
diff --git a/arch/mips/include/asm/mach-au1x00/gpio.h b/arch/mips/include/asm/mach-au1x00/gpio.h
index f9b7d41..c3f60cd 100644
--- a/arch/mips/include/asm/mach-au1x00/gpio.h
+++ b/arch/mips/include/asm/mach-au1x00/gpio.h
@@ -1,7 +1,7 @@
 #ifndef _ALCHEMY_GPIO_H_
 #define _ALCHEMY_GPIO_H_
 
-#if defined(CONFIG_ALCHEMY_GPIO_AU1000)
+#if defined(CONFIG_ALCHEMY_GPIOINT_AU1000)
 
 #include <asm/mach-au1x00/gpio-au1000.h>
 
-- 
1.6.5.3

[PATCH 3/3] MIPS: Alchemy: irq: use runtime CPU type detection

[Manuel Lauss]

Use runtime CPU detection instead of relying on preprocessor symbols.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
 arch/mips/alchemy/common/irq.c |   97 ++++++++++++++++++++++------------------
 1 files changed, 54 insertions(+), 43 deletions(-)

diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c
index 960a3ee..b2821ac 100644
--- a/arch/mips/alchemy/common/irq.c
+++ b/arch/mips/alchemy/common/irq.c
@@ -51,8 +51,9 @@ struct au1xxx_irqmap {
 	int im_irq;
 	int im_type;
 	int im_request;		/* set 1 to get higher priority */
-} au1xxx_ic0_map[] __initdata = {
-#if defined(CONFIG_SOC_AU1000)
+};
+
+struct au1xxx_irqmap au1000_irqmap[] __initdata = {
 	{ AU1000_UART0_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1000_UART1_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1000_UART2_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
@@ -84,9 +85,10 @@ struct au1xxx_irqmap {
 	{ AU1000_MAC0_DMA_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1000_MAC1_DMA_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1000_AC97C_INT,	  IRQ_TYPE_EDGE_RISING, 0 },
+	{ -1, },
+};
 
-#elif defined(CONFIG_SOC_AU1500)
-
+struct au1xxx_irqmap au1500_irqmap[] __initdata = {
 	{ AU1500_UART0_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1500_PCI_INTA,	  IRQ_TYPE_LEVEL_LOW,   0 },
 	{ AU1500_PCI_INTB,	  IRQ_TYPE_LEVEL_LOW,   0 },
@@ -116,9 +118,10 @@ struct au1xxx_irqmap {
 	{ AU1500_MAC0_DMA_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1500_MAC1_DMA_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1500_AC97C_INT,	  IRQ_TYPE_EDGE_RISING, 0 },
+	{ -1, },
+};
 
-#elif defined(CONFIG_SOC_AU1100)
-
+struct au1xxx_irqmap au1100_irqmap[] __initdata = {
 	{ AU1100_UART0_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1100_UART1_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1100_SD_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
@@ -150,9 +153,10 @@ struct au1xxx_irqmap {
 	{ AU1100_MAC0_DMA_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1100_LCD_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1100_AC97C_INT,	  IRQ_TYPE_EDGE_RISING, 0 },
+	{ -1, },
+};
 
-#elif defined(CONFIG_SOC_AU1550)
-
+struct au1xxx_irqmap au1550_irqmap[] __initdata = {
 	{ AU1550_UART0_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1550_PCI_INTA,	  IRQ_TYPE_LEVEL_LOW,   0 },
 	{ AU1550_PCI_INTB,	  IRQ_TYPE_LEVEL_LOW,   0 },
@@ -181,9 +185,10 @@ struct au1xxx_irqmap {
 	{ AU1550_USB_HOST_INT,	  IRQ_TYPE_LEVEL_LOW,   0 },
 	{ AU1550_MAC0_DMA_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1550_MAC1_DMA_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
+	{ -1, },
+};
 
-#elif defined(CONFIG_SOC_AU1200)
-
+struct au1xxx_irqmap au1200_irqmap[] __initdata = {
 	{ AU1200_UART0_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1200_SWT_INT,	  IRQ_TYPE_EDGE_RISING, 0 },
 	{ AU1200_SD_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
@@ -207,10 +212,7 @@ struct au1xxx_irqmap {
 	{ AU1200_USB_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1200_LCD_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
 	{ AU1200_MAE_BOTH_INT,	  IRQ_TYPE_LEVEL_HIGH,  0 },
-
-#else
-#error "Error: Unknown Alchemy SOC"
-#endif
+	{ -1, },
 };
 
 
@@ -547,36 +549,9 @@ handle:
 	do_IRQ(off);
 }
 
-/* setup edge/level and assign request 0/1 */
-static void __init setup_irqmap(struct au1xxx_irqmap *map, int count)
+static void __init au1000_init_irq(struct au1xxx_irqmap *map)
 {
 	unsigned int bit, irq_nr;
-
-	while (count--) {
-		irq_nr = map[count].im_irq;
-
-		if (((irq_nr < AU1000_INTC0_INT_BASE) ||
-		     (irq_nr >= AU1000_INTC0_INT_BASE + 32)) &&
-		    ((irq_nr < AU1000_INTC1_INT_BASE) ||
-		     (irq_nr >= AU1000_INTC1_INT_BASE + 32)))
-			continue;
-
-		if (irq_nr >= AU1000_INTC1_INT_BASE) {
-			bit = irq_nr - AU1000_INTC1_INT_BASE;
-			if (map[count].im_request)
-				au_writel(1 << bit, IC1_ASSIGNSET);
-		} else {
-			bit = irq_nr - AU1000_INTC0_INT_BASE;
-			if (map[count].im_request)
-				au_writel(1 << bit, IC0_ASSIGNSET);
-		}
-
-		au1x_ic_settype(irq_nr, map[count].im_type);
-	}
-}
-
-void __init arch_init_irq(void)
-{
 	int i;
 
 	/*
@@ -620,7 +595,43 @@ void __init arch_init_irq(void)
 	/*
 	 * Initialize IC0, which is fixed per processor.
 	 */
-	setup_irqmap(au1xxx_ic0_map, ARRAY_SIZE(au1xxx_ic0_map));
+	while (map->im_irq != -1) {
+		irq_nr = map->im_irq;
+
+		if (irq_nr >= AU1000_INTC1_INT_BASE) {
+			bit = irq_nr - AU1000_INTC1_INT_BASE;
+			if (map->im_request)
+				au_writel(1 << bit, IC1_ASSIGNSET);
+		} else {
+			bit = irq_nr - AU1000_INTC0_INT_BASE;
+			if (map->im_request)
+				au_writel(1 << bit, IC0_ASSIGNSET);
+		}
+
+		au1x_ic_settype(irq_nr, map->im_type);
+		++map;
+	}
 
 	set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3);
 }
+
+void __init arch_init_irq(void)
+{
+	switch (alchemy_get_cputype()) {
+	case ALCHEMY_CPU_AU1000:
+		au1000_init_irq(au1000_irqmap);
+		break;
+	case ALCHEMY_CPU_AU1500:
+		au1000_init_irq(au1500_irqmap);
+		break;
+	case ALCHEMY_CPU_AU1100:
+		au1000_init_irq(au1100_irqmap);
+		break;
+	case ALCHEMY_CPU_AU1550:
+		au1000_init_irq(au1550_irqmap);
+		break;
+	case ALCHEMY_CPU_AU1200:
+		au1000_init_irq(au1200_irqmap);
+		break;
+	}
+}
-- 
1.6.5.3

Re: [PATCH 1/3] MIPS: Alchemy: use runtime cpu detection in GPIO code.

[Ralf Baechle]

On Mon, Nov 23, 2009 at 08:40:00PM +0100, Manuel Lauss wrote:

> Remove the cpu subtype cpp macros in favor of runtime detection,
> to improve compile coverage of the alchemy common code.
> (Increases kernel size by 700 bytes).
> 
> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>

Thanks, queued for 2.6.33.

  Ralf

Re: [PATCH 2/3] MIPS: Alchemy: Only build AU1000 INTC code for compatible cpus

[Ralf Baechle]

On Mon, Nov 23, 2009 at 08:40:01PM +0100, Manuel Lauss wrote:

> Use the GPIO config symbol to only build Au1000 interrupt code on
> chips with compatible hw.
> 
> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>

Thanks, queued for 2.6.33.

  Ralf

Re: [PATCH 3/3] MIPS: Alchemy: irq: use runtime CPU type detection

[Ralf Baechle]

On Mon, Nov 23, 2009 at 08:40:02PM +0100, Manuel Lauss wrote:

> Use runtime CPU detection instead of relying on preprocessor symbols.
> 
> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>

Thanks, queued for 2.6.33.

  Ralf

Re: [PATCH 3/3] MIPS: Alchemy: irq: use runtime CPU type detection

[Manuel Lauss]

On Tue, Nov 24, 2009 at 12:17 AM, Ralf Baechle <ralf@linux-mips.org> wrote:
> On Mon, Nov 23, 2009 at 08:40:02PM +0100, Manuel Lauss wrote:
>
>> Use runtime CPU detection instead of relying on preprocessor symbols.
>>
>> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
>
> Thanks, queued for 2.6.33.

Thank you.  Could you also please rename the file from "irq.c" to "irq-au1000.c"
(and fix the Makefile).  The new name better reflects what type of CPU it is
supposed to work with. I'd send a patch, but I figure doing a "git mv" on your
end is faster and preserves the history of the file.

Thanks!
     Manuel Lauss

Re: [PATCH 3/3] MIPS: Alchemy: irq: use runtime CPU type detection

[Sergei Shtylyov]

Hello.

Manuel Lauss wrote:

> Use runtime CPU detection instead of relying on preprocessor symbols.

> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>

[...]

> @@ -547,36 +549,9 @@ handle:
>  	do_IRQ(off);
>  }
>  
> -/* setup edge/level and assign request 0/1 */
> -static void __init setup_irqmap(struct au1xxx_irqmap *map, int count)
> +static void __init au1000_init_irq(struct au1xxx_irqmap *map)
>  {

    Perhaps au1xxx_inint_irq() would be a better name...

WBR, Sergei

Re: [PATCH 3/3] MIPS: Alchemy: irq: use runtime CPU type detection

[mano]

Hi Sergei!

On Tue, Nov 24, 2009 at 05:27:18PM +0300, Sergei Shtylyov wrote:
> > Use runtime CPU detection instead of relying on preprocessor symbols.
> 
> > Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
> 
> [...]
> 
> > @@ -547,36 +549,9 @@ handle:
> >  	do_IRQ(off);
> >  }
> >  
> > -/* setup edge/level and assign request 0/1 */
> > -static void __init setup_irqmap(struct au1xxx_irqmap *map, int count)
> > +static void __init au1000_init_irq(struct au1xxx_irqmap *map)
> >  {
> 
>     Perhaps au1xxx_inint_irq() would be a better name...

I wanted to express that this is for au1000 and its compatible brethren
since the Au1300 has a completely different IRQ and GPIO system which
requires new code.

	Manuel