From: Sergei Shtylyov <sshtylyov@ru.mvista.com>
To: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>,
David Daney <ddaney@caviumnetworks.com>
Subject: Re: [PATCH 3/3] MIPS: deal with larger physical offsets
Date: Thu, 28 Jan 2010 19:37:33 +0300 [thread overview]
Message-ID: <4B61BD4D.5060406@ru.mvista.com> (raw)
In-Reply-To: <201001281522.37939.florian@openwrt.org>
Florian Fainelli wrote:
> AR7 has a larger physical offset than other MIPS based
> systems and therefore needs to setup its handlers beyond
> the usual KSEG0 range. When running the kernel in mapped
> mode this modification is also required. Remove function
> comment which is now incorrect.
>
> Signed-off-by: David Daney <ddaney@caviumnetworks.com>
> Signed-off-by: Eugene Konev <ejka@imfi.kspu.ru>
> Signed-off-by: Florian Fainelli <florian@openwrt.org>
> ---
> diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
> index 574608e..14d515f 100644
> --- a/arch/mips/kernel/traps.c
> +++ b/arch/mips/kernel/traps.c
...]
> @@ -1283,9 +1279,18 @@ void __init *set_except_vector(int n, void *addr)
>
> exception_handlers[n] = handler;
> if (n == 0 && cpu_has_divec) {
> - *(u32 *)(ebase + 0x200) = 0x08000000 |
> - (0x03ffffff & (handler >> 2));
> - local_flush_icache_range(ebase + 0x200, ebase + 0x204);
> + unsigned long jump_mask = ~((1 << 28) - 1);
> + u32 *buf = (u32 *)(ebase + 0x200);
> + unsigned int k0 = 26;
> + if((handler & jump_mask) == ((ebase + 0x200) & jump_mask)) {
>
Missing space after *if* (should be easy for Ralf to fix manually
though). You should run the patch thru scripts/checkpatch.pl first.
WBR, Sergei
next prev parent reply other threads:[~2010-01-28 16:56 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-28 14:22 [PATCH 3/3] MIPS: deal with larger physical offsets Florian Fainelli
2010-01-28 16:31 ` Ralf Baechle
2010-01-28 16:37 ` Sergei Shtylyov [this message]
2010-01-28 17:00 ` Ralf Baechle
2010-01-30 15:58 ` Maxime Bizon
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