Linux MIPS Architecture development
 help / color / mirror / Atom feed
From: David Daney <david.daney@cavium.com>
To: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: Re: [PATCH 2/2] MIPS: Add probes for more Octeon II CPUs.
Date: Thu, 22 Sep 2011 10:30:25 -0700	[thread overview]
Message-ID: <4E7B70B1.2080607@cavium.com> (raw)
In-Reply-To: <1316712378-7282-3-git-send-email-david.daney@cavium.com>

Crap, this is the wrong patch, it is from the other patch set.

I will now send the right 2/5

On 09/22/2011 10:26 AM, David Daney wrote:
> Detect cn61XX, cn66XX and cn68XX CPUs in cpu_probe_cavium().
>
> Signed-off-by: David Daney<david.daney@cavium.com>
> ---
>   arch/mips/kernel/cpu-probe.c |    3 +++
>   1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
> index ebc0cd2..aa327a7 100644
> --- a/arch/mips/kernel/cpu-probe.c
> +++ b/arch/mips/kernel/cpu-probe.c
> @@ -978,7 +978,10 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
>   platform:
>   		set_elf_platform(cpu, "octeon");
>   		break;
> +	case PRID_IMP_CAVIUM_CN61XX:
>   	case PRID_IMP_CAVIUM_CN63XX:
> +	case PRID_IMP_CAVIUM_CN66XX:
> +	case PRID_IMP_CAVIUM_CN68XX:
>   		c->cputype = CPU_CAVIUM_OCTEON2;
>   		__cpu_name[cpu] = "Cavium Octeon II";
>   		set_elf_platform(cpu, "octeon2");

  reply	other threads:[~2011-09-22 17:30 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-22 17:26 [PATCH v5 0/5] MIPS: perf: Add support for 64-bit MIPS hardware counters David Daney
2011-09-22 17:26 ` [PATCH v5 1/5] MIPS: Add accessor macros for 64-bit performance counter registers David Daney
2011-09-24  0:19   ` Ralf Baechle
2011-09-22 17:26 ` [PATCH 2/2] MIPS: Add probes for more Octeon II CPUs David Daney
2011-09-22 17:30   ` David Daney [this message]
2011-09-22 17:26 ` [PATCH v5 3/5] MIPS: perf: Reorganize contents of perf support files David Daney
2011-09-24  0:19   ` Ralf Baechle
2011-09-24  2:50   ` Deng-Cheng Zhu
2011-09-24 20:44     ` David Daney
2011-09-26  9:12       ` Deng-Cheng Zhu
2011-09-22 17:26 ` [PATCH v5 4/5] MIPS: perf: Add support for 64-bit perf counters David Daney
2011-09-24  0:20   ` Ralf Baechle
2011-09-24  2:54   ` Deng-Cheng Zhu
2011-09-24 20:57     ` David Daney
2011-09-26  9:07       ` Deng-Cheng Zhu
2011-09-22 17:26 ` [PATCH v5 5/5] MIPS: perf: Add Octeon support for hardware perf David Daney
2011-09-24  0:20   ` Ralf Baechle
2011-09-22 17:32 ` [PATCH v5 2/5] MIPS: perf: Cleanup formatting in arch/mips/kernel/perf_event.c David Daney
2011-09-24  0:19   ` Ralf Baechle
2011-09-24  2:48   ` Deng-Cheng Zhu
  -- strict thread matches above, loose matches on Subject: below --
2011-09-20 22:49 [PATCH 1/2] MIPS: Add more CPU identifiers for Octeon II CPUs David Daney
2011-09-20 22:49 ` [PATCH 2/2] MIPS: Add probes for more " David Daney
2011-09-23 23:50   ` Ralf Baechle

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4E7B70B1.2080607@cavium.com \
    --to=david.daney@cavium.com \
    --cc=linux-mips@linux-mips.org \
    --cc=ralf@linux-mips.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox