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From: Sergei Shtylyov <sshtylyov@mvista.com>
To: Sanjay Lal <sanjayl@kymasys.com>
Cc: kvm@vger.kernel.org, linux-mips@linux-mips.org
Subject: Re: [PATCH 15/20] MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs on a ASID wrap
Date: Thu, 01 Nov 2012 16:08:14 +0400	[thread overview]
Message-ID: <5092662E.7060800@mvista.com> (raw)
In-Reply-To: <333219EB-AEDE-47AE-BD69-2B69BBECD188@kymasys.com>

Hello.

On 31-10-2012 19:20, Sanjay Lal wrote:

> Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
> ---
>   arch/mips/include/asm/mmu_context.h | 6 ++++++
>   1 file changed, 6 insertions(+)

> diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
> index 9b02cfb..9c7024c 100644
> --- a/arch/mips/include/asm/mmu_context.h
> +++ b/arch/mips/include/asm/mmu_context.h
> @@ -112,15 +112,21 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
>   static inline void
>   get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
>   {
> +    extern void kvm_local_flush_tlb_all(void);
>   	unsigned long asid = asid_cache(cpu);
>
>   	if (! ((asid += ASID_INC) & ASID_MASK) ) {
>   		if (cpu_has_vtag_icache)
>   			flush_icache_all();
> +#ifdef CONFIG_VIRTUALIZATION
> +        kvm_local_flush_tlb_all();      /* start new asid cycle */

    Please use tabs to indent the code, not spaces.

WBR, Sergei

      reply	other threads:[~2012-11-01 12:09 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-31 15:20 [PATCH 15/20] MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs on a ASID wrap Sanjay Lal
2012-11-01 12:08 ` Sergei Shtylyov [this message]

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