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From: Avi Kivity <avi@redhat.com>
To: Sanjay Lal <sanjayl@kymasys.com>
Cc: kvm@vger.kernel.org, linux-mips@linux-mips.org
Subject: Re: [PATCH 07/20] KVM/MIPS32: Dynamic binary translation of select privileged instructions.
Date: Thu, 01 Nov 2012 17:24:28 +0200	[thread overview]
Message-ID: <5092942C.4080402@redhat.com> (raw)
In-Reply-To: <3E678B37-B4C1-409F-A1CB-A7CC83B2D874@kymasys.com>

On 10/31/2012 05:19 PM, Sanjay Lal wrote:
> Currently, the following instructions are translated:
> - CACHE (indexed)
> - CACHE (va based): translated to a synci, overkill on D-CACHE operations, but still much faster than a trap.
> - mfc0/mtc0: the virtual COP0 registers for the guest are implemented as 2-D array
>   [COP#][SEL] and this is mapped into the guest kernel address space @ VA 0x0.
>   mfc0/mtc0 operations are transformed to load/stores.
> 

Seems to be more of binary patching, yes?  Binary translation usually
involves hiding the translated code so the guest is not able to detect
that it is patched.


-- 
error compiling committee.c: too many arguments to function

  reply	other threads:[~2012-11-01 15:27 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-31 15:19 [PATCH 07/20] KVM/MIPS32: Dynamic binary translation of select privileged instructions Sanjay Lal
2012-11-01 15:24 ` Avi Kivity [this message]
2012-11-02  5:58   ` Sethi Varun-B16395
2012-11-02 16:57   ` Sanjay Lal
2012-11-02 17:00   ` Sanjay Lal

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