Re: [PATCH 03/10] MIPS: PCI: Byteswap not needed in little-endian mode

[Florian Fainelli <florian@openwrt.org>]

On 01/15/2013 12:58 PM, Sergei Shtylyov wrote:
> Hello.
>
> On 15-01-2013 10:19, Jayachandran C wrote:
>
>> Wrap the xlp_enable_pci_bswap() function and its call with
>> '#ifdef __BIG_ENDIAN'. On Netlogic XLP, the PCIe initialization code
>> to setup to byteswap is needed only in big-endian mode.
>
>> Signed-off-by: Jayachandran C <jchandra@broadcom.com>

[snip]

>> +/*
>> + * If big-endian, enable hardware byteswap on the PCIe bridges.
>> + * This will make both the SoC and PCIe devices behave consistently with
>> + * readl/writel.
>> + */
>> +static void xlp_config_pci_bswap(void)
>>   {
>> +#ifdef __BIG_ENDIAN
>>       uint64_t pciebase, sysbase;
>>       int node, i;
>>       u32 reg;
>> @@ -222,7 +228,7 @@ static int xlp_enable_pci_bswap(void)
>>           reg = nlm_read_bridge_reg(sysbase, BRIDGE_PCIEIO_LIMIT0 + i);
>>           nlm_write_pci_reg(pciebase, PCIE_BYTE_SWAP_IO_LIM, reg |
>> 0xfff);
>>       }
>> -    return 0;
>> +#endif
>
>     You misunderstood. #ifdef within functions are frowned upon. Thios
> patch is hardly better than previous then.

Jayachandran, you probably need something like this:

#ifdef __BIG_ENDIAN
static void xlp_config_pci_bswap(void)
{
	/* perform the actual swapping */
}
#else
static inline void xlp_config_pci_bswap(void) { }
#endif
--
Florian