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Message-ID: <51057F5E.80708@mvista.com>
Date:   Sun, 27 Jan 2013 23:26:22 +0400
From:   Sergei Shtylyov <sshtylyov@mvista.com>
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To:     John Crispin <blogic@openwrt.org>
CC:     Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: Re: [PATCH V2 07/10] MIPS: ralink: adds early_printk support
References: <1359309842-31925-1-git-send-email-blogic@openwrt.org> <1359309842-31925-8-git-send-email-blogic@openwrt.org>
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Hello.

On 27-01-2013 22:03, John Crispin wrote:

> Add the code needed to make early printk work.

> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>   arch/mips/ralink/early_printk.c |   45 +++++++++++++++++++++++++++++++++++++++
>   1 file changed, 45 insertions(+)
>   create mode 100644 arch/mips/ralink/early_printk.c

> diff --git a/arch/mips/ralink/early_printk.c b/arch/mips/ralink/early_printk.c
> new file mode 100644
> index 0000000..7a9b474
> --- /dev/null
> +++ b/arch/mips/ralink/early_printk.c
> @@ -0,0 +1,45 @@
> +/*
> + *  This program is free software; you can redistribute it and/or modify it
> + *  under the terms of the GNU General Public License version 2 as published
> + *  by the Free Software Foundation.
> + *
> + *  Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
> + */
> +
> +#include <linux/io.h>
> +#include <linux/serial_reg.h>
> +
> +#include <asm/addrspace.h>
> +
> +/* UART registers */
> +#define EARLY_UART_BASE         0x10000c00
> +
> +#define UART_REG_RX             0
> +#define UART_REG_TX             1
> +#define UART_REG_IER            2
> +#define UART_REG_IIR            3
> +#define UART_REG_FCR            4
> +#define UART_REG_LCR            5
> +#define UART_REG_MCR            6
> +#define UART_REG_LSR            7

    Isn;t it better to have register offsets premultiplied by 4? Saves you a 
multiplication in read/write functions (although they probably would be 
optmized out by gcc anyway).

> +
> +static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
> +
> +static inline void uart_w32(u32 val, unsigned reg)
> +{
> +	__raw_writel(val, uart_membase + (4 * reg));
> +}
> +
> +static inline u32 uart_r32(unsigned reg)
> +{
> +	return __raw_readl(uart_membase + (4 * reg));
> +}

WBR, Sergei