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From: David Daney <ddaney.cavm@gmail.com>
To: "Steven J. Hill" <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: Re: [PATCH] MIPS: micromips: Fix improper definition of ISA exception bit.
Date: Tue, 04 Jun 2013 11:42:48 -0700	[thread overview]
Message-ID: <51AE3528.8020601@gmail.com> (raw)
In-Reply-To: <1370370127-19681-1-git-send-email-Steven.Hill@imgtec.com>

On 06/04/2013 11:22 AM, Steven J. Hill wrote:
> The ISA exception bit selects whether exceptions are taken in classic
> MIPS or microMIPS mode. This bit is Config3.ISAOnExc and is bit 16. It
> It was improperly defined as bits 16 and 17. Fortunately, bit 17 is
> read-only and did not effect microMIPS operation. However, detecting
> a classic or microMIPS kernel when examining the /proc/cpuinfo file,
> the result always showed a microMIPS kernel.
>
> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
> ---
>   arch/mips/include/asm/mipsregs.h |    2 +-
>   arch/mips/kernel/cpu-probe.c     |   11 ++++++-----
>   2 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
> index 87e6207..fed1c3e 100644
> --- a/arch/mips/include/asm/mipsregs.h
> +++ b/arch/mips/include/asm/mipsregs.h
> @@ -596,7 +596,7 @@
>   #define MIPS_CONF3_RXI		(_ULCAST_(1) << 12)
>   #define MIPS_CONF3_ULRI		(_ULCAST_(1) << 13)
>   #define MIPS_CONF3_ISA		(_ULCAST_(3) << 14)
> -#define MIPS_CONF3_ISA_OE	(_ULCAST_(3) << 16)
> +#define MIPS_CONF3_ISA_OE	(_ULCAST_(1) << 16)
>   #define MIPS_CONF3_VZ		(_ULCAST_(1) << 23)
>
>   #define MIPS_CONF4_MMUSIZEEXT	(_ULCAST_(255) << 0)
> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
> index c6568bf..822bfe4 100644
> --- a/arch/mips/kernel/cpu-probe.c
> +++ b/arch/mips/kernel/cpu-probe.c
> @@ -256,6 +256,12 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
>   		c->ases |= MIPS_ASE_SMARTMIPS;
>   		c->options |= MIPS_CPU_RIXI;
>   	}
> +	if (config3 & MIPS_CONF3_ISA) {
> +		c->options |= MIPS_CPU_MICROMIPS;
> +#ifdef CONFIG_CPU_MICROMIPS
> +		write_c0_config3(config3 | MIPS_CONF3_ISA_OE);
> +#endif
> +	}

This function is supposed to be decoding the bits in config3, it 
shouldn't be changing the CPU operating mode.

Please move this to some other place (like prom_init() or 
kernel_entry_setup).


>   	if (config3 & MIPS_CONF3_RXI)
>   		c->options |= MIPS_CPU_RIXI;
>   	if (config3 & MIPS_CONF3_DSP)
> @@ -270,11 +276,6 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
>   		c->ases |= MIPS_ASE_MIPSMT;
>   	if (config3 & MIPS_CONF3_ULRI)
>   		c->options |= MIPS_CPU_ULRI;
> -	if (config3 & MIPS_CONF3_ISA)
> -		c->options |= MIPS_CPU_MICROMIPS;
> -#ifdef CONFIG_CPU_MICROMIPS
> -	write_c0_config3(read_c0_config3() | MIPS_CONF3_ISA_OE);
> -#endif
>   	if (config3 & MIPS_CONF3_VZ)
>   		c->ases |= MIPS_ASE_VZ;
>
>

      reply	other threads:[~2013-06-04 18:43 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-04 18:22 [PATCH] MIPS: micromips: Fix improper definition of ISA exception bit Steven J. Hill
2013-06-04 18:42 ` David Daney [this message]

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