From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Paul Burton <paul.burton@imgtec.com>, linux-mips@linux-mips.org
Subject: Re: [PATCH 06/15] mips: clear upper bits of FP registers on emulator writes
Date: Mon, 27 Jan 2014 21:06:52 +0300 [thread overview]
Message-ID: <52E6A03C.6070303@cogentembedded.com> (raw)
In-Reply-To: <1390836194-26286-7-git-send-email-paul.burton@imgtec.com>
Hello.
On 01/27/2014 06:23 PM, Paul Burton wrote:
> The upper bits of an FP register are architecturally defined as
> unpredictable following an instructions which only writes the lower
> bits. The prior behaviour of the kernel is to leave them unmodified.
> This patch modifies that to clear the upper bits to zero. This is what
> the MSA architecture reference manual specifies should happen for its
> wider registers and is still permissible for scalar FP instructions
> given the bits unpredictability there.
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> ---
> arch/mips/math-emu/cp1emu.c | 25 ++++++++++++++++++++-----
> 1 file changed, 20 insertions(+), 5 deletions(-)
> diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
> index 9144842..c484f5f 100644
> --- a/arch/mips/math-emu/cp1emu.c
> +++ b/arch/mips/math-emu/cp1emu.c
> @@ -884,20 +884,35 @@ static inline int cop1_64bit(struct pt_regs *xcp)
> } while (0)
>
> #define SITOREG(si, x) do { \
> - if (cop1_64bit(xcp)) \
> + if (cop1_64bit(xcp)) { \
> + unsigned i; \
> set_fpr32(&ctx->fpr[x], 0, si); \
> - else \
> + for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \
> + set_fpr32(&ctx->fpr[x], i, 0); \
> + } else { \
> set_fpr32(&ctx->fpr[(x) & ~1], (x) & 1, si); \
> + } \
> } while (0)
>
> #define SIFROMHREG(si, x) ((si) = get_fpr32(&ctx->fpr[x], 1))
> -#define SITOHREG(si, x) set_fpr32(&ctx->fpr[x], 1, si)
> +
> +#define SITOHREG(si, x) do { \
> + unsigned i; \
> + set_fpr32(&ctx->fpr[x], 1, si); \
> + for (i = 2; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \
> + set_fpr32(&ctx->fpr[x], i, 0); \
This line is over-indented, no? Compare the loop below...
> +} while (0)
>
> #define DIFROMREG(di, x) \
> ((di) = get_fpr64(&ctx->fpr[(x) & ~(cop1_64bit(xcp) == 0)], 0))
>
> -#define DITOREG(di, x) \
> - set_fpr64(&ctx->fpr[(x) & ~(cop1_64bit(xcp) == 0)], 0, di)
> +#define DITOREG(di, x) do { \
> + unsigned fpr, i; \
> + fpr = (x) & ~(cop1_64bit(xcp) == 0); \
> + set_fpr64(&ctx->fpr[fpr], 0, di); \
> + for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val64); i++) \
> + set_fpr64(&ctx->fpr[fpr], i, 0); \
> +} while (0)
WBR, Sergei
next prev parent reply other threads:[~2014-01-27 17:07 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-27 15:22 [PATCH 00/15] Initial MSA support Paul Burton
2014-01-27 15:22 ` Paul Burton
2014-01-27 15:23 ` [PATCH v2 01/15] mips: simplify FP context access Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-02-13 11:26 ` [PATCH v3 " Paul Burton
2014-02-13 11:26 ` Paul Burton
2014-01-27 15:23 ` [PATCH 02/15] mips: update outdated comment Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 03/15] mips: move & rename fpu_emulator_{save,restore}_context Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 04/15] mips: don't require FPU on sigcontext setup/restore Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 05/15] mips: replace hardcoded 32 with NUM_FPU_REGS in ptrace Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 06/15] mips: clear upper bits of FP registers on emulator writes Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 18:06 ` Sergei Shtylyov [this message]
2014-01-27 17:11 ` Paul Burton
2014-01-27 17:11 ` Paul Burton
2014-01-27 17:14 ` [PATCH v2 " Paul Burton
2014-01-27 17:14 ` Paul Burton
2014-01-27 15:23 ` [PATCH 07/15] mips: don't assume 64-bit FP registers for dump_{,task_}fpu Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 08/15] mips: don't assume 64-bit FP registers for FP regset Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 09/15] mips: don't assume 64-bit FP registers for context switch Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 10/15] mips: add MSA register definitions & access Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 11/15] mips: detect the MSA ASE Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 12/15] mips: basic MSA context switching support Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 13/15] mips: dumb MSA FP exception handler Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 15:23 ` [PATCH 14/15] mips: panic if vector register partitioning is implemented Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 18:38 ` David Daney
2014-01-27 19:39 ` Paul Burton
2014-01-27 19:39 ` Paul Burton
2014-01-27 19:56 ` David Daney
2014-01-28 14:20 ` Paul Burton
2014-01-28 14:20 ` Paul Burton
2014-01-28 14:28 ` [PATCH v2 14/15] mips: warn " Paul Burton
2014-01-28 14:28 ` Paul Burton
2014-01-27 15:23 ` [PATCH 15/15] mips: save/restore MSA context around signals Paul Burton
2014-01-27 15:23 ` Paul Burton
2014-01-27 19:50 ` David Daney
2014-01-27 20:06 ` Paul Burton
2014-01-27 20:06 ` Paul Burton
2014-02-13 11:27 ` [PATCH v2 " Paul Burton
2014-02-13 11:27 ` Paul Burton
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