From: David Daney <ddaney.cavm@gmail.com>
To: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Cc: linux-mips@linux-mips.org, paul.burton@imgtec.com,
Leonid.Yegoshin@imgtec.com, Steven.Hill@imgtec.com
Subject: Re: [PATCH] MIPS FPU emulator: Fix prefx detection and COP1X function field definition
Date: Thu, 06 Mar 2014 17:24:57 -0800 [thread overview]
Message-ID: <53191FE9.1040606@gmail.com> (raw)
In-Reply-To: <1394154327-16677-1-git-send-email-dengcheng.zhu@imgtec.com>
On 03/06/2014 05:05 PM, Deng-Cheng Zhu wrote:
> From: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
>
> When running applications which contain the instruction "prefx" on FPU-less
> CPUs, a message "Illegal instruction" will be seen. This instruction is
> supposed to be ignored by the FPU emulator. However, its current detection
> and function field encoding are incorrect. This patch fix the issue.
>
> Reviewed-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
> Reviewed-by: Paul Burton <paul.burton@imgtec.com>
> Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Looks good.
Acked-by: David Daney <david.daney@cavium.com>
> ---
> arch/mips/include/uapi/asm/inst.h | 4 ++--
> arch/mips/math-emu/cp1emu.c | 6 +++---
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
> index b39ba25..0832fac 100644
> --- a/arch/mips/include/uapi/asm/inst.h
> +++ b/arch/mips/include/uapi/asm/inst.h
> @@ -163,8 +163,8 @@ enum cop1_sdw_func {
> */
> enum cop1x_func {
> lwxc1_op = 0x00, ldxc1_op = 0x01,
> - pfetch_op = 0x07, swxc1_op = 0x08,
> - sdxc1_op = 0x09, madd_s_op = 0x20,
> + swxc1_op = 0x08, sdxc1_op = 0x09,
> + pfetch_op = 0x0f, madd_s_op = 0x20,
> madd_d_op = 0x21, madd_e_op = 0x22,
> msub_s_op = 0x28, msub_d_op = 0x29,
> msub_e_op = 0x2a, nmadd_s_op = 0x30,
> diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
> index 506925b..0b4e2e3 100644
> --- a/arch/mips/math-emu/cp1emu.c
> +++ b/arch/mips/math-emu/cp1emu.c
> @@ -1538,10 +1538,10 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
> break;
> }
>
> - case 0x7: /* 7 */
> - if (MIPSInst_FUNC(ir) != pfetch_op) {
> + case 0x3:
> + if (MIPSInst_FUNC(ir) != pfetch_op)
> return SIGILL;
> - }
> +
> /* ignore prefx operation */
> break;
>
>
next prev parent reply other threads:[~2014-03-07 1:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-07 1:05 [PATCH] MIPS FPU emulator: Fix prefx detection and COP1X function field definition Deng-Cheng Zhu
2014-03-07 1:05 ` Deng-Cheng Zhu
2014-03-07 1:24 ` David Daney [this message]
2014-03-07 9:25 ` James Hogan
2014-03-07 9:25 ` James Hogan
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