From: Alexander Sverdlin <alexander.sverdlin@nsn.com>
To: ddaney.cavm@gmail.com, ralf@linux-mips.org, linux-mips@linux-mips.org
Subject: [PATCH] Make Octeon GPIO IRQ chip CPU hotplug-aware
Date: Thu, 23 Oct 2014 15:55:04 +0200 [thread overview]
Message-ID: <544908B8.7050109@nsn.com> (raw)
From: Alexander Sverdlin <alexander.sverdlin@nsn.com>
Make Octeon GPIO IRQ chip CPU hotplug-aware
Seems that irq_cpu_offline callbacks were forgotten in v1 and v2 CIU
GPIO chips. There is such a callback for octeon_irq_chip_ciu2_gpio,
covering CIU2 chips. Without this callback GPIO IRQs are not being migrated
during core offlining. Patch is tested on Octeon II.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nsn.com>
---
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -809,6 +809,7 @@ static struct irq_chip octeon_irq_chip_ciu_gpio_v2 = {
.irq_set_type = octeon_irq_ciu_gpio_set_type,
#ifdef CONFIG_SMP
.irq_set_affinity = octeon_irq_ciu_set_affinity_v2,
+ .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
#endif
.flags = IRQCHIP_SET_TYPE_MASKED,
};
@@ -823,6 +824,7 @@ static struct irq_chip octeon_irq_chip_ciu_gpio = {
.irq_set_type = octeon_irq_ciu_gpio_set_type,
#ifdef CONFIG_SMP
.irq_set_affinity = octeon_irq_ciu_set_affinity,
+ .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
#endif
.flags = IRQCHIP_SET_TYPE_MASKED,
};
next reply other threads:[~2014-10-23 13:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-23 13:55 Alexander Sverdlin [this message]
2014-10-23 15:59 ` [PATCH] Make Octeon GPIO IRQ chip CPU hotplug-aware David Daney
2014-10-23 16:41 ` Ralf Baechle
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