From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 24 Nov 2014 19:50:46 +0100 (CET) Received: from e06smtp16.uk.ibm.com ([195.75.94.112]:56494 "EHLO e06smtp16.uk.ibm.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27006899AbaKXSuokYBb5 (ORCPT ); Mon, 24 Nov 2014 19:50:44 +0100 Received: from /spool/local by e06smtp16.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 24 Nov 2014 18:50:39 -0000 Received: from d06dlp02.portsmouth.uk.ibm.com (9.149.20.14) by e06smtp16.uk.ibm.com (192.168.101.146) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Mon, 24 Nov 2014 18:50:36 -0000 Received: from b06cxnps3074.portsmouth.uk.ibm.com (d06relay09.portsmouth.uk.ibm.com [9.149.109.194]) by d06dlp02.portsmouth.uk.ibm.com (Postfix) with ESMTP id E80472190045 for ; Mon, 24 Nov 2014 18:50:08 +0000 (GMT) Received: from d06av01.portsmouth.uk.ibm.com (d06av01.portsmouth.uk.ibm.com [9.149.37.212]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id sAOIoaO88716694 for ; Mon, 24 Nov 2014 18:50:36 GMT Received: from d06av01.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av01.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id sAOIoYIK009949 for ; Mon, 24 Nov 2014 11:50:35 -0700 Received: from oc1450873852.ibm.com (sig-9-79-90-165.de.ibm.com [9.79.90.165]) by d06av01.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id sAOIoYVP009932; Mon, 24 Nov 2014 11:50:34 -0700 Message-ID: <54737DF9.20009@de.ibm.com> Date: Mon, 24 Nov 2014 19:50:33 +0100 From: Christian Borntraeger User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: linux-kernel@vger.kernel.org CC: linux-arch@vger.kernel.org, linux-mips@linux-mips.org, linux-x86_64@vger.kernel.org, linux-s390@vger.kernel.org, Paolo Bonzini , paulmck@linux.vnet.ibm.com, mingo@kernel.org, torvalds@linux-foundation.org, Catalin Marinas , Will Deacon Subject: Re: [PATCH/RFC 6/7] arm64: Replace ACCESS_ONCE for spinlock code with barriers References: <1416834210-61738-1-git-send-email-borntraeger@de.ibm.com> <1416834210-61738-7-git-send-email-borntraeger@de.ibm.com> In-Reply-To: <1416834210-61738-7-git-send-email-borntraeger@de.ibm.com> Content-Type: text/plain; charset=iso-8859-15 Content-Transfer-Encoding: 7bit X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 14112418-0025-0000-0000-0000028DE730 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 44389 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: borntraeger@de.ibm.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips Am 24.11.2014 um 14:03 schrieb Christian Borntraeger: > ACCESS_ONCE does not work reliably on non-scalar types. For > example gcc 4.6 and 4.7 might remove the volatile tag for such > accesses during the SRA (scalar replacement of aggregates) step > (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145) > > Change the spinlock code to access the lock with a barrier. > > Signed-off-by: Christian Borntraeger > --- > arch/arm64/include/asm/spinlock.h | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/include/asm/spinlock.h b/arch/arm64/include/asm/spinlock.h > index c45b7b1..f72dc64 100644 > --- a/arch/arm64/include/asm/spinlock.h > +++ b/arch/arm64/include/asm/spinlock.h > @@ -99,12 +99,15 @@ static inline int arch_spin_value_unlocked(arch_spinlock_t lock) > > static inline int arch_spin_is_locked(arch_spinlock_t *lock) > { > - return !arch_spin_value_unlocked(ACCESS_ONCE(*lock)); > + arch_spinlock_t lockval = *lock; > + barrier(); > + return !arch_spin_value_unlocked(lockval); > } > > static inline int arch_spin_is_contended(arch_spinlock_t *lock) > { > - arch_spinlock_t lockval = ACCESS_ONCE(*lock); > + arch_spinlock_t lockval = *lock; > + barrier(); > return (lockval.next - lockval.owner) > 1; > } > #define arch_spin_is_contended arch_spin_is_contended > FWIW, we could also make this with ACCESS_ONCE, but this requires to change the definition of arch_spinlock_t for arm64 to be a union. I am a bit reluctant to do these changes without being able to test. Let me know if this is preferred and if somebody else can test. Christian