From: Markos Chandras <Markos.Chandras@imgtec.com>
To: "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
Subject: Re: [PATCH 4/4] MIPS; asm: bitops: Add missing ISA levels for MIPS R6
Date: Mon, 9 Mar 2015 15:24:40 +0000 [thread overview]
Message-ID: <54FDBB38.4070600@imgtec.com> (raw)
In-Reply-To: <1425408530-21613-5-git-send-email-markos.chandras@imgtec.com>
On 03/03/2015 06:48 PM, Markos Chandras wrote:
> Commit 87a927eff4da("MIPS: asm: bitops: update ISA constraints for
> MIPS R6 support") replaced hardcoded ISA levels in order to support
> MIPS R6 new opcodes but it missed a few cases.
>
> Fixes: 87a927eff4da("MIPS: asm: bitops: update ISA constraints for MIPS R6 support")
> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
> ---
This patch is not needed since it introduced new ".set" statements for
no good reason. I marked it as rejected in patchwork.
--
markos
prev parent reply other threads:[~2015-03-09 15:24 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-03 18:48 [PATCH 0/4] MIPS R6 fixes for 4.0 Markos Chandras
2015-03-03 18:48 ` Markos Chandras
2015-03-03 18:48 ` [PATCH 1/4] MIPS: asm: r4kcache: Use correct base register for MIPS R6 cache flushes Markos Chandras
2015-03-03 18:48 ` Markos Chandras
2015-03-05 13:46 ` Maciej W. Rozycki
2015-03-09 8:43 ` Markos Chandras
2015-03-09 8:43 ` Markos Chandras
2015-03-23 20:40 ` Maciej W. Rozycki
2015-03-24 8:59 ` Markos Chandras
2015-03-24 8:59 ` Markos Chandras
2015-03-03 18:48 ` [PATCH 2/4] MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case Markos Chandras
2015-03-03 18:48 ` Markos Chandras
2015-03-03 18:48 ` [PATCH 3/4] MIPS: kernel: entry.S: Set correct ISA level for mips_ihb Markos Chandras
2015-03-03 18:48 ` Markos Chandras
2015-03-03 18:48 ` [PATCH 4/4] MIPS; asm: bitops: Add missing ISA levels for MIPS R6 Markos Chandras
2015-03-03 18:48 ` Markos Chandras
2015-03-09 15:24 ` Markos Chandras [this message]
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