From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: "Maciej W. Rozycki" <macro@linux-mips.org>,
Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Subject: Re: [PATCH 18/48] MIPS: math-emu: Factor out CFC1/CTC1 emulation
Date: Sat, 04 Apr 2015 02:33:18 +0300 [thread overview]
Message-ID: <551F233E.4040602@cogentembedded.com> (raw)
In-Reply-To: <alpine.LFD.2.11.1504030318150.21028@eddie.linux-mips.org>
Hello.
On 04/04/2015 01:25 AM, Maciej W. Rozycki wrote:
> Move CFC1/CTC1 emulation code to separate functions to avoid excessive
> indentation in forthcoming changes. Adjust formatting in a minor way
> and remove extraneous round brackets.
> Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
> ---
> linux-mips-emu-cxc.diff
> Index: linux/arch/mips/math-emu/cp1emu.c
> ===================================================================
> --- linux.orig/arch/mips/math-emu/cp1emu.c 2015-04-02 20:27:54.099185000 +0100
> +++ linux/arch/mips/math-emu/cp1emu.c 2015-04-02 20:27:54.459192000 +0100
> @@ -840,6 +840,52 @@ do { \
> #define DPTOREG(dp, x) DITOREG((dp).bits, x)
>
> /*
> + * Emulate a CFC1 instruction.
> + */
> +static inline void cop1_cfc(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
> + mips_instruction ir)
> +{
> + u32 value;
> +
> + if (MIPSInst_RD(ir) == FPCREG_CSR) {
> + value = ctx->fcr31;
> + pr_debug("%p gpr[%d]<-csr=%08x\n",
> + (void *)xcp->cp0_epc,
> + MIPSInst_RT(ir), value);
> + } else if (MIPSInst_RD(ir) == FPCREG_RID)
> + value = 0;
> + else
> + value = 0;
CodingStyle: all arms of the *if* statement shouyld have {} if at leats
one has them.
> + if (MIPSInst_RT(ir))
> + xcp->regs[MIPSInst_RT(ir)] = value;
> +}
> +
> +/*
> + * Emulate a CTC1 instruction.
> + */
> +static inline void cop1_ctc(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
> + mips_instruction ir)
> +{
> + u32 value;
> +
> + if (MIPSInst_RT(ir) == 0)
> + value = 0;
> + else
> + value = xcp->regs[MIPSInst_RT(ir)];
> +
> + /* we only have one writable control reg
> + */
This comment would fit on a single line.
[...]
WBR, Sergei
next prev parent reply other threads:[~2015-04-03 23:33 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-03 22:23 [PATCH 00/48] FPU and FP emulation clean-ups, fixes and feature updates Maciej W. Rozycki
2015-04-03 22:23 ` [PATCH 01/48] doc: kernel-parameters.txt: Mark `nofpu' for MIPS too Maciej W. Rozycki
2015-04-03 22:23 ` [PATCH 02/48] MIPS: mipsregs.h: Remove broken comments Maciej W. Rozycki
2015-04-03 22:23 ` [PATCH 03/48] MIPS: mipsregs.h: Reorder CP1 macro definitions Maciej W. Rozycki
2015-04-03 22:23 ` [PATCH 04/48] MIPS: mipsregs.h: Move TX39 macros out of the way Maciej W. Rozycki
2015-04-03 22:23 ` [PATCH 05/48] MIPS: mipsregs.h: Reindent CP0 Cause macros Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 06/48] MIPS: ieee754.h: Correct comments for special values Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 07/48] MIPS: ieee754.h: Supplement " Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 08/48] MIPS: Correct the comment for FPU emulator traps Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 09/48] MIPS: Clarify the comment for `__cpu_has_fpu' Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 10/48] MIPS: math-emu: Reindent `bc_op' emulation Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 11/48] MIPS: Correct the comment for and reformat `movf_func' Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 12/48] MIPS: math-emu: Fix oversize lines in comparisons Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 13/48] MIPS: ELF: Drop `get_fp_abi' Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 14/48] MIPS: mips-r2-to-r6-emul.h: Inline empty `mipsr2_decoder' Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 15/48] MIPS: Reindent R6 RI exception emulation Maciej W. Rozycki
2015-04-03 22:24 ` [PATCH 16/48] MIPS: math-emu: Remove `modeindex' macro Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 17/48] MIPS: bitops.h: Avoid inline asm for constant FLS Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 18/48] MIPS: math-emu: Factor out CFC1/CTC1 emulation Maciej W. Rozycki
2015-04-03 23:33 ` Sergei Shtylyov [this message]
2015-04-04 0:07 ` Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 19/48] MIPS: Normalise code flow in the CpU exception handler Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 20/48] MIPS: Use `FPU_CSR_ALL_X' in `__build_clear_fpe' Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 21/48] MIPS: math-emu: Update sNaN quieting handlers Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 23/48] MIPS: math-emu: Don't pass qNaNs through " Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 24/48] MIPS: math-emu: Reinstate sNaN " Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 25/48] MIPS: math-emu: Optimise NaN handling in comparisons Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 26/48] MIPS: math-emu: Remove redundant code from NaN comparison Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 27/48] MIPS: math-emu: Remove dead comparison helpers Maciej W. Rozycki
2015-04-03 22:25 ` [PATCH 29/48] MIPS: math-emu: Make NaN classifiers static Maciej W. Rozycki
2015-04-03 23:22 ` Sergei Shtylyov
2015-04-03 22:26 ` [PATCH 30/48] MIPS: Correct `nofpu' non-functionality Maciej W. Rozycki
2015-04-03 22:26 ` [PATCH 31/48] MIPS: Correct MIPS16 BREAK code interpretation Maciej W. Rozycki
2015-04-03 22:26 ` [PATCH 32/48] MIPS: BREAK instruction interpretation corrections Maciej W. Rozycki
2015-04-03 22:26 ` [PATCH 33/48] MIPS: Fix BREAK code interpretation heuristics Maciej W. Rozycki
2015-04-03 22:26 ` [PATCH 34/48] MIPS: math-emu: Fix delay-slot emulation cache incoherency Maciej W. Rozycki
2015-04-03 22:26 ` [PATCH 35/48] MIPS: Correct MIPS I FP context layout Maciej W. Rozycki
2015-04-03 22:26 ` [PATCH 36/48] MIPS: Correct FP ISA requirements Maciej W. Rozycki
2015-04-03 22:26 ` [PATCH 37/48] MIPS: math-emu: Correct delay-slot exception propagation Maciej W. Rozycki
2016-01-20 10:50 ` Aurelien Jarno
2016-01-20 15:15 ` Maciej W. Rozycki
2015-04-03 22:27 ` [PATCH 38/48] MIPS: math-emu: Move long fixed-point support into an `ar' library Maciej W. Rozycki
2015-04-03 22:27 ` [PATCH 39/48] MIPS: Respect the FCSR exception mask for `si_code' Maciej W. Rozycki
2015-04-03 22:27 ` [PATCH 40/48] MIPS: Always clear FCSR cause bits after emulation Maciej W. Rozycki
2015-04-03 22:27 ` [PATCH 41/48] MIPS: Set `si_code' for SIGFPE signals sent from emulation too Maciej W. Rozycki
2015-04-03 22:27 ` [PATCH 42/48] MIPS: Correct ISA masking in FPU feature determination Maciej W. Rozycki
2015-04-03 22:27 ` [PATCH 43/48] MIPS: math-emu: Set FIR feature flags for full emulation Maciej W. Rozycki
2015-04-03 23:18 ` Sergei Shtylyov
2015-04-03 22:27 ` [PATCH 44/48] MIPS: math-emu: Implement the FCCR, FEXR and FENR registers Maciej W. Rozycki
2015-04-03 22:27 ` [PATCH 45/48] MIPS: math-emu: Define IEEE 754-2008 feature control bits Maciej W. Rozycki
2015-04-03 22:27 ` [PATCH 46/48] MIPS: math-emu: Make ABS.fmt and NEG.fmt arithmetic again Maciej W. Rozycki
2015-04-07 15:24 ` Maciej W. Rozycki
2015-04-07 17:31 ` Ralf Baechle
2015-04-07 23:11 ` Maciej W. Rozycki
2015-04-03 22:27 ` [PATCH 47/48] MIPS: Respect the ISA level in FCSR handling Maciej W. Rozycki
2015-04-07 12:54 ` Ralf Baechle
2015-04-07 21:13 ` Maciej W. Rozycki
2015-04-07 22:45 ` Ralf Baechle
2015-04-03 22:27 ` [PATCH 48/48] MIPS: Factor out FPU feature probing Maciej W. Rozycki
2015-04-04 20:04 ` [PATCH 00/48] FPU and FP emulation clean-ups, fixes and feature updates Ralf Baechle
2015-04-04 20:55 ` Maciej W. Rozycki
2015-04-04 21:57 ` Ralf Baechle
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