From: David Daney <ddaney@caviumnetworks.com>
To: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: David Daney <ddaney@caviumnetworks.com>,
Ed Swierk <eswierk@skyportsystems.com>,
linux-mips <linux-mips@linux-mips.org>,
driverdev-devel <devel@driverdev.osuosl.org>,
netdev <netdev@vger.kernel.org>,
Aaro Koskinen <aaro.koskinen@nokia.com>
Subject: Re: Improving OCTEON II 10G Ethernet performance
Date: Thu, 25 Aug 2016 13:11:45 -0700 [thread overview]
Message-ID: <57BF5101.6080909@caviumnetworks.com> (raw)
In-Reply-To: <20160825182210.GE12169@raspberrypi.musicnaut.iki.fi>
On 08/25/2016 11:22 AM, Aaro Koskinen wrote:
> Hi,
>
> On Thu, Aug 25, 2016 at 09:50:15AM -0700, David Daney wrote:
>> Ideally we would configure the packet classifiers on the RX side to create
>> multiple RX queues based on a hash of the TCP 5-tuple, and handle each queue
>> with a single NAPI instance. That should result in better performance while
>> maintaining packet ordering.
>
> Would this need anything else than reprogramming CVMX_PIP_PRT_TAGX, and
> eliminating the global pow_receive_group and creating multiple NAPI instances
> and registering IRQ handlers?
>
That is essentially how it works. Set the tag generation parameters,
and use the low order bits of the tag to select which POW/SSO group is
assigned. The SSO group corresponds to an "rx queue"
> In the Yocto tree, the CVMX_PIP_PRT_TAGX register values are actually
> documented:
>
> http://git.yoctoproject.org/cgit/cgit.cgi/linux-yocto-contrib/tree/arch/mips/include/asm/octeon/cvmx-pip-defs.h?h=apaliwal/octeon#n3737
Wow, I didn't realize that documentation was made public.
>
> A.
>
next prev parent reply other threads:[~2016-08-25 20:12 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-25 1:29 Improving OCTEON II 10G Ethernet performance Ed Swierk
2016-08-25 16:50 ` David Daney
2016-08-25 18:22 ` Aaro Koskinen
2016-08-25 20:11 ` David Daney [this message]
2016-08-25 21:18 ` Aaro Koskinen
2016-08-25 22:26 ` David Daney
2016-08-25 17:32 ` Aaro Koskinen
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