From: Marc Zyngier <maz@kernel.org>
To: Huacai Chen <chenhc@lemote.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
linux-mips@vger.kernel.org, Fuxin Zhang <zhangfx@lemote.com>,
Huacai Chen <chenhuacai@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
stable@vger.kernel.org
Subject: Re: [PATCH 3/3] irqchip/loongson-pch-pic: Reserve legacy LPC irqs
Date: Thu, 10 Sep 2020 11:08:34 +0100 [thread overview]
Message-ID: <613dd7bc4d7eeec1a5fd30f679fc83eb@kernel.org> (raw)
In-Reply-To: <1599624552-17523-3-git-send-email-chenhc@lemote.com>
On 2020-09-09 05:09, Huacai Chen wrote:
> Reserve legacy LPC irqs (0~15) to avoid spurious interrupts.
How can they be spurious? Why are they enabled the first place?
This looks like you are papering over a much bigger issue.
M.
>
> Cc: stable@vger.kernel.org
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
> drivers/irqchip/irq-loongson-pch-pic.c | 19 ++++++++++++++++++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-loongson-pch-pic.c
> b/drivers/irqchip/irq-loongson-pch-pic.c
> index 9bf6b9a..9f6719c 100644
> --- a/drivers/irqchip/irq-loongson-pch-pic.c
> +++ b/drivers/irqchip/irq-loongson-pch-pic.c
> @@ -35,6 +35,7 @@
>
> struct pch_pic {
> void __iomem *base;
> + struct irq_domain *lpc_domain;
> struct irq_domain *pic_domain;
> u32 ht_vec_base;
> raw_spinlock_t pic_lock;
> @@ -184,9 +185,9 @@ static void pch_pic_reset(struct pch_pic *priv)
> static int pch_pic_of_init(struct device_node *node,
> struct device_node *parent)
> {
> + int i, base, err;
> struct pch_pic *priv;
> struct irq_domain *parent_domain;
> - int err;
>
> priv = kzalloc(sizeof(*priv), GFP_KERNEL);
> if (!priv)
> @@ -213,6 +214,22 @@ static int pch_pic_of_init(struct device_node
> *node,
> goto iounmap_base;
> }
>
> + base = irq_alloc_descs(-1, 0, NR_IRQS_LEGACY, 0);
> + if (base < 0) {
> + pr_err("Failed to allocate LPC IRQ numbers\n");
> + goto iounmap_base;
> + }
> +
> + priv->lpc_domain = irq_domain_add_legacy(node, NR_IRQS_LEGACY, 0, 0,
> + &irq_domain_simple_ops, NULL);
> + if (!priv->lpc_domain) {
> + pr_err("Failed to add irqdomain for LPC controller");
> + goto iounmap_base;
> + }
> +
> + for (i = 0; i < NR_IRQS_LEGACY; i++)
> + irq_set_chip_and_handler(i, &dummy_irq_chip, handle_simple_irq);
> +
> priv->pic_domain = irq_domain_create_hierarchy(parent_domain, 0,
> PIC_COUNT,
> of_node_to_fwnode(node),
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2020-09-10 10:08 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-09 4:09 [PATCH 1/3] MIPS: Loongson64: Increase NR_IRQS to 320 Huacai Chen
2020-09-09 4:09 ` [PATCH 2/3] irqchip/loongson-htvec: Fix initial interrupts clearing Huacai Chen
2020-09-09 4:09 ` [PATCH 3/3] irqchip/loongson-pch-pic: Reserve legacy LPC irqs Huacai Chen
2020-09-10 0:51 ` Jiaxun Yang
2020-09-10 1:40 ` Huacai Chen
2020-09-10 10:08 ` Marc Zyngier [this message]
2020-09-11 4:13 ` Huacai Chen
2020-09-11 7:50 ` Marc Zyngier
2020-09-11 10:12 ` Huacai Chen
2020-09-10 16:34 ` Sasha Levin
2020-09-11 0:12 ` Huacai Chen
2020-09-10 10:10 ` [PATCH 1/3] MIPS: Loongson64: Increase NR_IRQS to 320 Marc Zyngier
2020-09-11 3:24 ` Huacai Chen
2020-09-11 7:44 ` Marc Zyngier
2020-09-11 8:43 ` Huacai Chen
2020-09-11 9:03 ` Marc Zyngier
2020-09-11 9:14 ` Huacai Chen
2020-09-11 9:23 ` Marc Zyngier
2020-09-11 9:40 ` Huacai Chen
2020-09-10 16:34 ` Sasha Levin
2020-09-11 0:11 ` Huacai Chen
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