From: Krzysztof Kozlowski <krzk@kernel.org>
To: Sui Jingfeng <15330273260@189.cn>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Roland Scheidegger <sroland@vmware.com>,
Zack Rusin <zackr@vmware.com>,
Christian Gmeiner <christian.gmeiner@gmail.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Rob Herring <robh+dt@kernel.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Dan Carpenter <dan.carpenter@oracle.com>,
Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>,
Sam Ravnborg <sam@ravnborg.org>,
"David S . Miller" <davem@davemloft.net>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Lucas Stach <l.stach@pengutronix.de>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Ilia Mirkin <imirkin@alum.mit.edu>,
Qing Zhang <zhangqing@loongson.cn>, Li Yi <liyi@loongson.cn>,
suijingfeng <suijingfeng@loongson.cn>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v8 2/3] MIPS: Loongson64: dts: update the display controller device node
Date: Thu, 17 Feb 2022 09:42:26 +0100 [thread overview]
Message-ID: <687aad50-6e37-dab9-71a0-4df89abbd9d4@kernel.org> (raw)
In-Reply-To: <20220216181712.1493400-3-15330273260@189.cn>
On 16/02/2022 19:17, Sui Jingfeng wrote:
> From: suijingfeng <suijingfeng@loongson.cn>
>
> The display controller is a pci device, its PCI vendor id is 0x0014
> its PCI device id is 0x7a06.
>
> 1) In order to let the lsdc kms driver to know which chip the DC is
> contained in, we add different compatible for different chip.
>
> 2) Add display controller device node for ls2k1000 SoC
>
> Signed-off-by: suijingfeng <suijingfeng@loongson.cn>
> Signed-off-by: Sui Jingfeng <15330273260@189.cn>
> ---
> .../loongson/loongson,display-controller.yaml | 114 ++++++++++++++++++
> .../display/loongson/loongson-drm.txt | 16 +++
Please split dt-bindings from other changes into a separate patch, which
should be first in the series.
> .../boot/dts/loongson/loongson64-2k1000.dtsi | 8 ++
> arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 +-
> 4 files changed, 140 insertions(+), 5 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml
> create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson-drm.txt
>
> diff --git a/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml
> new file mode 100644
> index 000000000000..64d8364b50ab
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml
> @@ -0,0 +1,114 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/pci0014,7a06.yaml#
The file name looks different than ID. Does this pass `make
dt_binding_check` validation?
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Loongson LS7A2000/LS7A1000/LS2K1000/LS2K0500 Display Controller Device Tree Bindings
> +
> +maintainers:
> + - Sui Jingfeng <suijingfeng@loongson.cn>
> +
> +description: |+
> +
> + Loongson display controllers are simple which require scanout buffers
> + to be physically contiguous. LS2K1000/LS2K0500 is a SOC, only system
> + memory is available. LS7A1000/LS7A2000 is bridge chip which is equipped
> + with a dedicated video ram which is 64MB or more.
> +
> + For LS7A1000, there are 4 dedicated GPIOs whose control register is
> + located at the DC register space. They are used to emulate two way i2c,
> + One for DVO0, another for DVO1.
> +
> + LS2K1000 and LS2K0500 SoC grab i2c adapter from other module, either
> + general purpose GPIO emulated i2c or hardware i2c in the SoC.
> +
> + LSDC has two display pipes, each way has a DVO interface which provide
> + RGB888 signals, vertical & horizontal synchronisations, data enable and
> + the pixel clock. LSDC has two CRTC, each CRTC is able to scanout from
> + 1920x1080 resolution at 60Hz. Each CRTC has two FB address registers.
> +
> + LSDC's display pipeline have several components as below description,
> +
> + The display controller in LS7A1000:
> + ___________________ _________
> + | -------| | |
> + | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monotor |
> + | _ _ -------| ^ ^ |_________|
> + | | | | | -------| | |
> + | |_| |_| | i2c0 <--------+-------------+
> + | -------|
> + | DC IN LS7A1000 |
> + | _ _ -------|
> + | | | | | | i2c1 <--------+-------------+
> + | |_| |_| -------| | | _________
> + | -------| | | | |
> + | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel |
> + | -------| |_________|
> + |___________________|
> +
> + Simple usage of LS7A1000 with LS3A4000 CPU:
> +
> + +------+ +-----------------------------------+
> + | DDR4 | | +-------------------+ |
> + +------+ | | PCIe Root complex | LS7A1000 |
> + || MC0 | +--++---------++----+ |
> + +----------+ HT 3.0 | || || |
> + | LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+
> + | CPU |<-------->| | GC1000 | | LSDC |<-->| DDR3 MC |<->| VRAM |
> + +----------+ | +--------+ +-+--+-+ +---------+ +------+
> + || MC1 +---------------|--|----------------+
> + +------+ | |
> + | DDR4 | +-------+ DVO0 | | DVO1 +------+
> + +------+ VGA <--|ADV7125|<--------+ +-------->|TFP410|--> DVI/HDMI
> + +-------+ +------+
> +
> + The display controller in LS2K1000/LS2K0500:
> + ___________________ _________
> + | -------| | |
> + | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monotor |
> + | _ _ -------| ^ ^ |_________|
> + | | | | | | | |
> + | |_| |_| | +------+ |
> + | <---->| i2c0 |<---------+
> + | DC IN LS2K1000 | +------+
> + | _ _ | +------+
> + | | | | | <---->| i2c1 |----------+
> + | |_| |_| | +------+ | _________
> + | -------| | | | |
> + | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel |
> + | -------| |_________|
> + |___________________|
> +
> +properties:
> + compatible:
> + enum:
> + - loongson,ls7a2000-dc
> + - loongson,ls7a1000-dc
> + - loongson,ls2k1000-dc
> + - loongson,ls2k0500-dc
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + minItems: 1
You need also maxItems. If you have only one interrupt, then just
maxItems:1.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + lsdc: dc@6,1 {
node name should be generic: "display-controller"
The unit address does not look like matching the reg property. Is this
how it suppose to be?
> + compatible = "loongson,ls7a1000-dc";
> + reg = <0x3100 0x0 0x0 0x0 0x0>;
> + interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-parent = <&pic>;
> + };
> +
> +...
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-02-17 8:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-16 18:17 [PATCH v8 0/3] drm/lsdc: add drm driver for loongson display controller Sui Jingfeng
2022-02-16 18:17 ` [PATCH v8 2/3] MIPS: Loongson64: dts: update the display controller device node Sui Jingfeng
2022-02-16 18:44 ` Jiaxun Yang
2022-02-16 19:05 ` Sui Jingfeng
2022-02-17 8:42 ` Krzysztof Kozlowski [this message]
2022-02-17 11:07 ` Sui Jingfeng
2022-02-17 16:39 ` Rob Herring
2022-02-21 1:35 ` Sui Jingfeng
2022-02-16 18:17 ` [PATCH v8 3/3] MAINTAINERS: add maintainers for DRM LSDC driver Sui Jingfeng
2022-02-17 8:43 ` Krzysztof Kozlowski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=687aad50-6e37-dab9-71a0-4df89abbd9d4@kernel.org \
--to=krzk@kernel.org \
--cc=15330273260@189.cn \
--cc=airlied@linux.ie \
--cc=andrey.zhizhikin@leica-geosystems.com \
--cc=christian.gmeiner@gmail.com \
--cc=dan.carpenter@oracle.com \
--cc=daniel@ffwll.ch \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=imirkin@alum.mit.edu \
--cc=jiaxun.yang@flygoat.com \
--cc=l.stach@pengutronix.de \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=liyi@loongson.cn \
--cc=maarten.lankhorst@linux.intel.com \
--cc=mripard@kernel.org \
--cc=robh+dt@kernel.org \
--cc=sam@ravnborg.org \
--cc=sroland@vmware.com \
--cc=suijingfeng@loongson.cn \
--cc=tsbogend@alpha.franken.de \
--cc=tzimmermann@suse.de \
--cc=zackr@vmware.com \
--cc=zhangqing@loongson.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).