From: Marc Zyngier <maz@kernel.org>
To: Huacai Chen <chenhc@lemote.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
"open list:MIPS" <linux-mips@vger.kernel.org>,
Fuxin Zhang <zhangfx@lemote.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
stable <stable@vger.kernel.org>
Subject: Re: [PATCH 3/3] irqchip/loongson-pch-pic: Reserve legacy LPC irqs
Date: Fri, 11 Sep 2020 08:50:40 +0100 [thread overview]
Message-ID: <6af66ab3dbf81cc1d0cf4c204ebac2b8@kernel.org> (raw)
In-Reply-To: <CAAhV-H5Rs-PHV6Sy=1tbhsF-nj5MOYgvNie_5g7+8yFYT_2Anw@mail.gmail.com>
On 2020-09-11 05:13, Huacai Chen wrote:
> Hi, Marc,
>
> On Thu, Sep 10, 2020 at 6:08 PM Marc Zyngier <maz@kernel.org> wrote:
>>
>> On 2020-09-09 05:09, Huacai Chen wrote:
>> > Reserve legacy LPC irqs (0~15) to avoid spurious interrupts.
>>
>> How can they be spurious? Why are they enabled the first place?
>>
>> This looks like you are papering over a much bigger issue.
> The spurious interrupts are probably occurred after kdump and the irq
> number is in legacy LPC ranges. I think this is because the old kernel
> doesn't (and it can't) disable devices properly so there are stale
> interrupts in the kdump case.
I don't really understand why the old kernel can't turn the interrupts
off. Most architectures are able t, why not yours?
Finally, why don't you just shut these interrupts off the first place
in the interrupt controller init? Adding a whole lot of kernel
data structures as a band-aid doesn't strike me as the best possible
idea. Not to mention that if they keep firing, all you are doing
is adding extra overhead.
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2020-09-11 7:50 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-09 4:09 [PATCH 1/3] MIPS: Loongson64: Increase NR_IRQS to 320 Huacai Chen
2020-09-09 4:09 ` [PATCH 2/3] irqchip/loongson-htvec: Fix initial interrupts clearing Huacai Chen
2020-09-09 4:09 ` [PATCH 3/3] irqchip/loongson-pch-pic: Reserve legacy LPC irqs Huacai Chen
2020-09-10 0:51 ` Jiaxun Yang
2020-09-10 1:40 ` Huacai Chen
2020-09-10 10:08 ` Marc Zyngier
2020-09-11 4:13 ` Huacai Chen
2020-09-11 7:50 ` Marc Zyngier [this message]
2020-09-11 10:12 ` Huacai Chen
2020-09-10 16:34 ` Sasha Levin
2020-09-11 0:12 ` Huacai Chen
2020-09-10 10:10 ` [PATCH 1/3] MIPS: Loongson64: Increase NR_IRQS to 320 Marc Zyngier
2020-09-11 3:24 ` Huacai Chen
2020-09-11 7:44 ` Marc Zyngier
2020-09-11 8:43 ` Huacai Chen
2020-09-11 9:03 ` Marc Zyngier
2020-09-11 9:14 ` Huacai Chen
2020-09-11 9:23 ` Marc Zyngier
2020-09-11 9:40 ` Huacai Chen
2020-09-10 16:34 ` Sasha Levin
2020-09-11 0:11 ` Huacai Chen
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