From: Keith Owens <kaos@sgi.com>
To: Adam Kiepul <Adam_Kiepul@pmc-sierra.com>
Cc: "'linux-mips@linux-mips.org'" <linux-mips@linux-mips.org>
Subject: Re: A question on Linux SMP and cache coherency
Date: Fri, 24 Jan 2003 10:32:31 +1100 [thread overview]
Message-ID: <7650.1043364751@ocs3.intra.ocs.com.au> (raw)
In-Reply-To: Your message of "Thu, 23 Jan 2003 15:21:01 -0800." <71690137A786F7428FF9670D47CB95ED10DF71@SJE4EXM01>
On Thu, 23 Jan 2003 15:21:01 -0800,
Adam Kiepul <Adam_Kiepul@pmc-sierra.com> wrote:
> I would really appreciate if anyone could tell me whether Hardware-maintained cache coherency between processors is required for Linux SMP operation.
http://www.uwsg.iu.edu/hypermail/linux/kernel/0007.3/1220.html
next prev parent reply other threads:[~2003-01-23 23:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-01-23 23:21 A question on Linux SMP and cache coherency Adam Kiepul
2003-01-23 23:32 ` Keith Owens [this message]
-- strict thread matches above, loose matches on Subject: below --
2003-01-23 23:17 Adam Kiepul
2003-01-24 14:31 ` Ralf Baechle
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