Re: [PATCH v4] mips: Do not include hi and lo in clobber list for R6

[Romain Naour <romain.naour@gmail.com>]

Hi Sudip, All,

Le 20/04/2021 à 23:12, Sudip Mukherjee a écrit :
> From: Romain Naour <romain.naour@gmail.com>
> 
> From [1]
> "GCC 10 (PR 91233) won't silently allow registers that are not
> architecturally available to be present in the clobber list anymore,
> resulting in build failure for mips*r6 targets in form of:
> ...
> .../sysdep.h:146:2: error: the register ‘lo’ cannot be clobbered in ‘asm’ for the current target
>   146 |  __asm__ volatile (      \
>       |  ^~~~~~~
> 
> This is because base R6 ISA doesn't define hi and lo registers w/o DSP
> extension. This patch provides the alternative clobber list for r6 targets
> that won't include those registers."
> 
> Since kernel 5.4 and mips support for generic vDSO [2], the kernel fail to
> build for mips r6 cpus with gcc 10 for the same reason as glibc.
> 
> [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=020b2a97bb15f807c0482f0faee2184ed05bcad8
> [2] '24640f233b46 ("mips: Add support for generic vDSO")'
> 
> Signed-off-by: Romain Naour <romain.naour@gmail.com>
> Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
> ---
> 
> v4: [sudip] added macro VDSO_SYSCALL_CLOBBERS and fix checkpatch errors with commit message.
> v3 Avoid duplicate code (Maciej W. Rozycki)
> v2 use MIPS_ISA_REV instead of __mips_isa_rev (Alexander Lobakin)
> 
> I have reused the original patch by Romain and have retained his s-o-b
> and author name as he is the original author of this patch. I have just
> added the macro. Build tested with gcc-10.3.1 and gcc-9.3.0.
> 

Thanks for the rework!

Best regards,
Romain