From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 07 Mar 2018 21:23:18 +0100 (CET) Received: from outils.crapouillou.net ([89.234.176.41]:33830 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S23994728AbeCGUXKCe1Sq (ORCPT ); Wed, 7 Mar 2018 21:23:10 +0100 To: PrasannaKumar Muralidharan Subject: Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Date: Wed, 07 Mar 2018 21:23:08 +0100 From: Paul Cercueil Cc: James Hogan , Herbert Xu , Rob Herring , Ralf Baechle , "David S . Miller" , "open list:HARDWARE RANDOM NUMBER GENERATOR CORE" , Linux-MIPS , Mathieu Malaterre , noloader@gmail.com Subject: In-Reply-To: References: <20170918140241.24003-1-prasannatsmkumar@gmail.com> <20170918140241.24003-4-prasannatsmkumar@gmail.com> <20180306091932.GM4197@saruman> <788bf0bf0d0aaa97f59bc908ebf34ebf@crapouillou.net> Message-ID: <7a99f4da84eba2f980be2ee0889810f4@crapouillou.net> X-Sender: paul@crapouillou.net Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 62846 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: paul@crapouillou.net Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips Hi PrasannaKumar, Le 2018-03-07 15:51, PrasannaKumar Muralidharan a écrit : > Hi Paul, > > On 7 March 2018 at 04:31, Paul Cercueil wrote: >> Le 2018-03-06 10:32, James Hogan a écrit : >>> >>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan >>> wrote: >>>> >>>> Add RNG node to jz4780 dtsi. This driver uses registers that are >>>> part of >>>> the register set used by Ingenic CGU driver. Use regmap in RNG >>>> driver to >>>> access its register. Create 'simple-bus' node, make CGU and RNG node >>>> as >>>> child of it so that both the nodes are visible without changing CGU >>>> driver code. >>>> >>>> Signed-off-by: PrasannaKumar Muralidharan >>>> >>> >>> >>> Better late than never: >>> Acked-by: James Hogan >>> >>> (I presume its okay for the reg ranges to overlap, ISTR that being an >>> issue a few years ago, but maybe thats fixed now). >>> >>> Cheers >>> James >> >> >> What bothers me is that the CGU code has not been modified to use >> regmap, so >> the >> registers area is actually mapped twice (once in the CGU driver, once >> with >> regmap). > > One of my previous versions changed CGU code to use regmap. I got a > review comment saying that is not required > (https://patchwork.kernel.org/patch/9906889/). The points in the > comment were valid so I reverted the change. Please have a look at the > discussion. I don't know, the point of regmap is for when a register area is shared. It does not make sense to me to have one driver use regmap and not the other one. >> Besides, regmap would be useful if the RNG registers were actually >> located >> in the >> middle of the register area used by the CGU driver, which is not the >> case >> here. >> The CGU block does have some registers after the RNG ones on the X1000 >> SoC, >> but >> I don't think they will ever be used (and if they are it won't be by >> the CGU >> driver). >> >> Regards, >> -Paul > > Ingenic M200 SoC's CGU has clock and power related registers after the > RNG registers. Paul Burton suggested using regmap to expose registers > to CGU and RNG drivers > (https://patchwork.linux-mips.org/patch/14094/). Where can I find the M200 programming manual? The M200's CGU might have some registers located after the RNG ones, but that does not mean that they will be used by the clocks driver. Thanks, -Paul From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from outils.crapouillou.net ([89.234.176.41]:33830 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S23994728AbeCGUXKCe1Sq (ORCPT ); Wed, 7 Mar 2018 21:23:10 +0100 Subject: Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Date: Wed, 07 Mar 2018 21:23:08 +0100 From: Paul Cercueil Subject: In-Reply-To: References: <20170918140241.24003-1-prasannatsmkumar@gmail.com> <20170918140241.24003-4-prasannatsmkumar@gmail.com> <20180306091932.GM4197@saruman> <788bf0bf0d0aaa97f59bc908ebf34ebf@crapouillou.net> Message-ID: <7a99f4da84eba2f980be2ee0889810f4@crapouillou.net> Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: PrasannaKumar Muralidharan Cc: James Hogan , Herbert Xu , Rob Herring , Ralf Baechle , "David S . Miller" , "open list:HARDWARE RANDOM NUMBER GENERATOR CORE" , Linux-MIPS , Mathieu Malaterre , noloader@gmail.com Message-ID: <20180307202308.oAEy2D29Cm8ehTkApd4VYtmYVh03mOuvt6mMWKyTQG4@z> Hi PrasannaKumar, Le 2018-03-07 15:51, PrasannaKumar Muralidharan a écrit : > Hi Paul, > > On 7 March 2018 at 04:31, Paul Cercueil wrote: >> Le 2018-03-06 10:32, James Hogan a écrit : >>> >>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan >>> wrote: >>>> >>>> Add RNG node to jz4780 dtsi. This driver uses registers that are >>>> part of >>>> the register set used by Ingenic CGU driver. Use regmap in RNG >>>> driver to >>>> access its register. Create 'simple-bus' node, make CGU and RNG node >>>> as >>>> child of it so that both the nodes are visible without changing CGU >>>> driver code. >>>> >>>> Signed-off-by: PrasannaKumar Muralidharan >>>> >>> >>> >>> Better late than never: >>> Acked-by: James Hogan >>> >>> (I presume its okay for the reg ranges to overlap, ISTR that being an >>> issue a few years ago, but maybe thats fixed now). >>> >>> Cheers >>> James >> >> >> What bothers me is that the CGU code has not been modified to use >> regmap, so >> the >> registers area is actually mapped twice (once in the CGU driver, once >> with >> regmap). > > One of my previous versions changed CGU code to use regmap. I got a > review comment saying that is not required > (https://patchwork.kernel.org/patch/9906889/). The points in the > comment were valid so I reverted the change. Please have a look at the > discussion. I don't know, the point of regmap is for when a register area is shared. It does not make sense to me to have one driver use regmap and not the other one. >> Besides, regmap would be useful if the RNG registers were actually >> located >> in the >> middle of the register area used by the CGU driver, which is not the >> case >> here. >> The CGU block does have some registers after the RNG ones on the X1000 >> SoC, >> but >> I don't think they will ever be used (and if they are it won't be by >> the CGU >> driver). >> >> Regards, >> -Paul > > Ingenic M200 SoC's CGU has clock and power related registers after the > RNG registers. Paul Burton suggested using regmap to expose registers > to CGU and RNG drivers > (https://patchwork.linux-mips.org/patch/14094/). Where can I find the M200 programming manual? The M200's CGU might have some registers located after the RNG ones, but that does not mean that they will be used by the clocks driver. Thanks, -Paul